My application require a differential clk input on AD9216, that is CLKA and CLKB is 180 degrees to each other, is this allowed? The datasheet says the skew between two clks should be within +- 1ns, what does this mean?
If CLKA and CLKB is180 degrees to each other, could I connet MUX_SELECT to CLKA to get a DDR output data on Data bus A? Is there any timing issue on this configuration?
Thanks a lot!