I am working on a design where I need to sample two AD9629 ADC's simultaneously. They will be driven by the same differential clock source. I am about to begin the FPGA design, and want to make some basic decisions before I finalize the board.
My question is, if both chips are being driven by the same clock, will their DCO signals be (reasonably) in phase? Can I sample both 12 bit digital outputs from the chips using one of the DCO signals, or does it make more sense to switch the differential clock inputs to each chip (and thereby phase shift the two DCO signals 180°)? What would the standard approach be?
Thanks for any input.