AD9257 Debug

Hi All.

I'm trying to get SerDes output from a set of AD9257's on a custom PCB.

1) No shorts on any pins

2) Correct SPI data and clock (running at ~1.5MHz)

3) Correct SPI register transmission settings things such as ADC digital reset and clock divider

4) Correct LVDS sample clock at 160MHz *(CLK_DIV = 4 for 40MS/s)

Upon board power up the ADCs do not yet have a correct clock, which here is coming from an AD9577 PLL. As such the DS indicates we need to issue an ADC Digital FSM reset to allow it to re-do its normal bias setup state machine. At the same time we set up other SPI registers with parameters such as test modes, duty cycle stabilization etc.

Now the problem is:

1) I currently cannot tell if the ADC SPI has actually changed the settings I want setting, and

2) DCO/FCO and all data lines seem to be held static at 0V (LVDS should have one high and one low right).

Now my current probe setup is 2 single-ended 1MOhm terminated probes. For the correct sample clock input the far end is already 100Ohm terminated. But for all FCO, DCO and data LVDS lines we are using the FPGA internal 100Ohm termination scheme.

Do I need to modify my measurement methodology to detect these LVDS signals, or is there an issue with the ADCs themselves. Any way to assess we are getting correct SPI modification of the internal registers, and any way to debug the outputs.

Many thanks.

Ed

  • Also:

    - Analogue supply is correct at 1.8V

    - Digital supply is correct at 1.8V

    But:

    - VCM output is sat at 2.1V rather than 0.9V

  • Scratch that.

    - VCM was being held high by a misbehaving op-amp earlier in the signal chain. With that turned off, VCM sits at 0V

  • 0
    •  Analog Employees 
    on Dec 10, 2015 12:23 AM

    Hi Ed,

    Thank you for using the AD9257, and for your detailed description.

    Your start up sequence sounds good, of course assuming your SPI actions are really getting to the chip.

    First though, would you please provide more information about VCM being at 0V? Is this the VCM pin on the AD9257 that is at 0V?

    Thank you.

    Doug

  • Hi Doug,

    Thanks:

    - The SPI actions are getting to the ADCs SPI I/O pins, 1.8V with SCLK at 3MHz, I've checked the data stream and it looks correct in terms of transmitted bits, number of bits per transaction etc.

    - I've tested the LVDS input clock, this uses a 100Ohm diff term followed by AC coupling capacitors, again this does make it to the ADC's pins. It is 160MHz for the prospective use of an internal ADC clock divider ratio of 4 (40MS/s operation).

    - The VCM is the output VCM pin of the ADC, normally this should be 1/2 VDD so 0.9V, however as mentioned I suspect the ADC is not correctly setting up bias levels on power up as the PLL is also powering up, hence the issuing of the ADC digital reset register via SPI.

         - Yes the ADC's VCM pin is at 0V, with VCM open to GND so no short.

    Any help would be much appreciated.

    Thanks.

    Ed

  • 0
    •  Analog Employees 
    on Dec 11, 2015 1:07 AM

    Hi Ed,

    This is a case of conflicting conditions.

    - You are having issues with SPI communications.

    - You see 0V on VCM, which normally would require SPI action.

    If power is applied to the supply pins of the AD9257, there should be about 0.9V on the VCM pin unless the VCM buffer is powered down by writing Register 0x102 = 0x08. I do not believe you are doing this so I have no explanation for this yet.

    Could you please double check that power is applied to all the supply pins on the AD9257?

    Previously you mentioned that an opamp was applying 2.1V to the VCM pin. Is there any chance that the opamp applied a voltage high enough to damage the VCM output? Are you seeing VCM = 0V on all the AD9257s on your board?

    Is the VCM pin connected to anything on the board, or is it completely disconnected?

    Related to SPI communications, are you taking CSB low during your SPI communications?

    Thank you.

    Doug