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How to choose for read FIFO SPI interface for AD6641?

1 How to choose for read FIFO SPI interface for AD6641? In which register of SPI and what values we need to write?

2 How to choose the SPORT interface? In which register of SPI and what values we need to write?

How to initialize a fill command through the SPI port without standby? In which register of SPI and what values we need to write?

4 How to use bits of the register 0x102?

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  • Hi

    Thank you very much for your answer.

    Sorry for delay. My answer to your question

    I think, if in data sheet of the information are correct and full enough to build in system AD6641 simply.

      Harness the HSC-ADC-EVALCZ - expensive and not necessary.

    We are already working with the AD6641. We have following questions.

    1 What happens in the AD6641 when bits 2 and 3 entries in the register 102?

    2 Why for Empty signal should be after reading all the words from the FIFO to make 5 more 'empty' (code 0000) reads from the FIFO?

    3 If AD6641 in a mode slave what can be maximal and minimal SP_SCLK and  SCLK?

    4 What bit of the register can be controlled key CML (Figure 26 data sheet)?


    SNK

Reply
  • Hi

    Thank you very much for your answer.

    Sorry for delay. My answer to your question

    I think, if in data sheet of the information are correct and full enough to build in system AD6641 simply.

      Harness the HSC-ADC-EVALCZ - expensive and not necessary.

    We are already working with the AD6641. We have following questions.

    1 What happens in the AD6641 when bits 2 and 3 entries in the register 102?

    2 Why for Empty signal should be after reading all the words from the FIFO to make 5 more 'empty' (code 0000) reads from the FIFO?

    3 If AD6641 in a mode slave what can be maximal and minimal SP_SCLK and  SCLK?

    4 What bit of the register can be controlled key CML (Figure 26 data sheet)?


    SNK

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