Is there a location for the AD9656 HDL that I would be able to view? Has anyone at ADI done any Vivado development for the AD9656 ADC and has a shareable project?
I can provide the FPGA source code, but we cannot include any IP from Xilinx. I'll send you an email with more information.
Hi，Dougl，Could you please send me this code as well?Thanks!my email is email@example.com
I need the source code.could you e-mail to me? firstname.lastname@example.org
I've requested that sample FPGA source code written for AD9656 capture on the HSC-ADC-EVALEZ be sent to you.