Guys,
I have a customer evaluating AD9681. They would use EVAL-AD9681 which seems to connect with HSC-ADC-EVALDZ.
Can you give me the FPGA HDL code for this configuration?
Regards.
Matteo
AD9681
Recommended for New Designs
The AD9681 is an octal, 14-bit, 125 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit that is designed for low cost, low power...
Datasheet
AD9681 on Analog.com
Guys,
I have a customer evaluating AD9681. They would use EVAL-AD9681 which seems to connect with HSC-ADC-EVALDZ.
Can you give me the FPGA HDL code for this configuration?
Regards.
Matteo
Hi Teocrosio,
Sample FPGA capture code for the AD9681 is found here:
ftp://ftp.analog.com/pub/HSSP_SW/fpga/AD9681_Sample_FPGA_code.zip
This is written for Xilinx Virtex6.
This code is:
Thank you very much.
Doug
Hi akgulb,
Thanks for your interest in AD9681. I've requested that the sample code be emailed to you.
It is for the HSC-ADC-EVALEZ, which has replaced the .HSC-ADC-EVALDZ.
You should receive the code within a day or so.
Thanks,
Doug
Hi Doug,
There is material available here:
http://wiki.analog.com/resources/fpga/altera/bemicro/ad7691
and here:
http://wiki.analog.com/resources/fpga/xilinx/interposer/ad7691
Thanks,
Padraic
Hi Doug,
There is material available here:
http://wiki.analog.com/resources/fpga/altera/bemicro/ad7691
and here:
http://wiki.analog.com/resources/fpga/xilinx/interposer/ad7691
Thanks,
Padraic