Please tell me the practicable range of the AD9634 LVDS interface.

I read AD9634 datasheet.

In Figure 55. Differential LVDS Sample Clock (Up to 625 MHz), AD9634 is recever and AD9511 driver.

AD9511 Differential Output Voltage 250mV - 450mV.

AD9634 Differential clock input 300mV - 3.6V.

When AD9511 output 250mV, would AD9634 be able to receive a signal?

Please advise me.

  • 0
    •  Analog Employees 
    on Jun 29, 2016 4:51 PM

    Hi Mochi,

    The VOD specification given in the AD9511 data sheet is for the peak value of the output signal.  This means that the minimum peak value of the LVDS output is 250mV.  The peak to peak value is 500mV.  See Figure 19 in the AD9511 data sheet for reference.

    The differential input voltage minimum specification for the AD9634 is 300mV peak to peak.  The AD9511 has 200mV of margin to meeting this specification.  You should be able to clock the AD9634 with the AD9511.  There may be some newer parts that could interest you such as the AD9523, AD9525, or AD9528 that have better jitter performance.  At 12 bits the AD9511 may be sufficient, but it depends on your system noise requirements.  I just thought I'd let you know of some other potential options.



  • I acquired right knowledge.

    Thank you very much for your quick answer.