I want to use the data clock output for FPGA at CMOS mode.I know the default mode is CMOS mode.
But,I find my DCOA and DCOB works at LVDS mode.
So how to deal with this problem?
AD9600
Production
The AD9600 is a dual, 10-bit, 105 MSPS/125 MSPS/150 MSPS
ADC. It is designed to support communications applications
where low cost, small size, and versatility...
Datasheet
AD9600 on Analog.com
I want to use the data clock output for FPGA at CMOS mode.I know the default mode is CMOS mode.
But,I find my DCOA and DCOB works at LVDS mode.
So how to deal with this problem?