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Easystack firmware module

Hi,

A few months ago, an Easystack firmware distribution was posted under thread https://ez.analog.com/thread/51904 named HMC15xx_source_files.zip.  Building the firmware failed because the flashprog module definition is missing from the distribution.

May I have the flashprog module source?

Thanks,

Robert

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  • Hi all,

    I am kind of facing the same problem, and i completely understand the last argument. 

    Could you share with us some extra information about the functionality achieved by this block?

    I am also facing Errors like ERROR:HDLCompiler:1511 , that seems to be a Warning on some old ISE versions.

    Could we by any chance get more information about the toolchain used and if possible a project file (that is missing in the sources).

    This would be really helpful.

    Best regards,

    Bruno

  • Hello Bruno, 

    Did you get a solution to this problem?

  • Hi Alex,

    I didn't get answer from AD, but I found my way to get something working. It's already a while already, and I implemented quite some changes, but still, I guess I could help you to some extend, depending on your question. Related to the missing flashprog block, I simply removed it's instantiation, and thus lost the feature.

    I also changed the code to fix errors and warnings in the shared code. From this point, I managed to get it compiling/working with ISE14.7 and the Hittite GUI.

    I didn't manage to get Hittite GUI sources, so I redesigned my GUI, following the some UART protocol, and running the same setup procedure by sniffing on the UART to see what was sent by the GUI during the setup and answered by the ADC.As a warning, if you go this direction, you'll see quite not great things.

    Then I basically improved/cleaned-up the communication system, and then moved this code to Spartan7 family and Vivado.

    On a very different topic, please note that if you consider using the ADC eval board, you are likely to face issues with high speed clock. I changed the clocking from FPGA source to external source (PLL) through the SMA connector, and even if it helped a little running on faster clock, I  couldn't reach the max spec speed. And unfortunately AD is not interested in fixing these limitations.

    Please note that all the same apply to HMCAD1520

    If you are interested in further details, feel free to ask.

    Best regards !

Reply
  • Hi Alex,

    I didn't get answer from AD, but I found my way to get something working. It's already a while already, and I implemented quite some changes, but still, I guess I could help you to some extend, depending on your question. Related to the missing flashprog block, I simply removed it's instantiation, and thus lost the feature.

    I also changed the code to fix errors and warnings in the shared code. From this point, I managed to get it compiling/working with ISE14.7 and the Hittite GUI.

    I didn't manage to get Hittite GUI sources, so I redesigned my GUI, following the some UART protocol, and running the same setup procedure by sniffing on the UART to see what was sent by the GUI during the setup and answered by the ADC.As a warning, if you go this direction, you'll see quite not great things.

    Then I basically improved/cleaned-up the communication system, and then moved this code to Spartan7 family and Vivado.

    On a very different topic, please note that if you consider using the ADC eval board, you are likely to face issues with high speed clock. I changed the clocking from FPGA source to external source (PLL) through the SMA connector, and even if it helped a little running on faster clock, I  couldn't reach the max spec speed. And unfortunately AD is not interested in fixing these limitations.

    Please note that all the same apply to HMCAD1520

    If you are interested in further details, feel free to ask.

    Best regards !

Children
  • Hello Bruno,

    Thank you for your reply.

    Likewise, I ended up packet sniffing, reverse engineering the protocol & verifying against the provided Verilog files. I now have an interface working (ish) using an SP605 and a LabVIEW GUI.

    As far as I can tell, the flashprog module was only used to perform firmware upgrades via their GUI.

    Thankfully for our application, we just need two channels at ~250MSPS, so this board "should" suffice if we can improve the timing performance of the firmware (currently we're limited to circa 112MSPS).

    Our end game with this proof-of-concept, is to stream the data out via either the 1000MBit PHY or SFP port, with serial just being used for config.

    Best regards,

    Alex

  • Hi Alex, good job!

    My understanding of the flashprog is the same. If my understanding is correct, you can even generate one in the Xilinx IP catalog.

    On the performance you report, what is limiting you to 112Msps?

    I don't output the sample,s I process them in FPGA, so I didn't develop any high speed output, so I can't share any feedback on 1000MBit PHY or SFP port

    Bruno