I bought a HSC-ADC-EVALCZ capture board plus a AD9251 EVL. In my project, the signal frequency which need to be sampled is below 30KHz.
Now, I have a problem. It is found that the signal frequency below 76KHz could not be sampled accurately; I have attaced some results. The signal frequency is 26 KHz, 66KHz and 76KHz. In this case,the sampling rate is set to be 20MHz.
So, I want to know what is the minimum signal frequency that could be sampled accurately by AD9251 EVL. Meanwhile, if AD9251 EVL could not satify me, could you please reconmend another A/D product.
Thank you so much!
An example of how to modify the board is attached. The original schematic can be found in UG-003 on www.analog.com .
Here is a very incomplete discussion on the possible effect on performance.
A portion of noise coupling to a differential signal will affect both components of the signal, which is common mode noise. A large portion of this noise is naturally rejected by the ADC. This modification requires going to a single-ended signal at the ADC inputs. Noise coupled to a single-ended signal will not be rejected in the same way.
Also, this modification causes what previously were the inverting and non-inverting sides not to match with each other, looking back from the ADC inputs. This could also affect ADC performance.
The board was originally designed for differential signaling, which is best for AC performance. Changing to single-ended could affect SNR, SINAD, SFDR and linearity, as well as other parameters.
The pdf above is the input design.I will appreciate it a lot if you can give me some tips on modification.
Thanks a lot.
Are you able to DC couple? It will be difficult to find a signal transformer with the same footprint that will pass 50Hz, and AC coupling capacitors would have to be quite large.
Is your signal single-ended or differential?
Are you using the ADI AD9251 evaluation board, or your own board design?
Dear Dougi,thanks for your reply! It is intended to be DC coupled,but now my design seemed unreasonable.The present design is shown in the pictures attached to the reply. My signal is differencial and and what I want to sampled for computation is around 15kHz. The signal is composed of 50Hz、15kHz,and both ought to be sampled. Also,my signal between VIN1+ and Vin1- is ac signal ranging from -1V to 1V.The VIN1- is connected to the AGND_ADC,does this work?
Another question is that
I am wondering if it is proper to delete the RF transformer and use resistor to connect VIN1+ and VINA instead. Is this way OK?
Another question is that when I set the VCM at 0.9V and input the signal at VIN+A and VIN-A,which is directly connected to the AD9251 VIN+ and VIN-,the digital result seen in FPGA has a offset of 8912(=2^13) .Is this reasonable when I use offset binary output mode?
Nonetheless,in this board,1bit digital value is corresponded to 150 uV other than 122uV ,the latter of which is shown in the datasheet.Therefore,I wonder if the directly input mode influences the correctness and the function of the AD chip.Could you give me some advice on the design of the input board.
Here is the output result seen in FPGA.
Thank you for the information.
VIN1- being connected to AGND_ADC will not work, but it seems to me that you are not doing that. You said that your signal is differential which means that VIN1- would have to be connected to a signal source, and not ground. Would you please clarify?
If you are DC coupling you must bypass the transformer. If the transformer is being bypassed then there is no problem deleting it.
Regarding VCM = 0.9V, this is a good value for VCM. How do you achieve VCM = 0.9V if VIN1- is connected to AGND_ADC? I'm sorry for my misunderstanding.
With VIN-A = VIN+A = 0.9V (same as 0V differential), I expect the ADC to output close to mid-scale code, which is 2^13 = 8192. So yes, this is a good mid-scale value.
I do not know why you are seeing closer to 150uV/LSB rather than 122uV/LSB.