How can i interface AD9265 with CMOS single ended clock driver without using transformer ?
do i need a clock driver ? actually i am driving my clock from FPGA cyclone V.
Do you have any design file which interface this adc to cyclone V ?
What differential amplifier should i use for single ended analog input (AD8375/AD8370/ADA4938) ?
The ADA4938 is characterized up to a gain of 5. I would not recommend using it for a gain of 10dB. The LT6406 is a good choice. It is lower noise, lower power, and it can be set to a gain of 10dB. You can connect the LT6406 directly to the ADC. No balun is required when the common mode is set to the ADC's common mode.
The AD9550 has a good jitter spec for your frequency range. As for the 42.8 MHz from 50 MHz, you can get close, but I'm not sure which combination of integers will make exactly 42.8 MHz. I did a quick calculation, and I was able to get 42.74 MHz with divide by 5 , R = 1, N=389, p1 = 1, p2 = 91. Agin, no balun is required for the input as long as you stay within the input spec.
As for the clock source, the CVHD-950 oscillator is what I recommend.