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Always getting overrange on FIFO Status of AD6641

Hello, I'm trying to access AD6641 registers via SPI to handle data from ultrasound pulses.

I wrote a test code with reference to this article: How to choose for read FIFO SPI interface for AD6641? 

Unfortunately, however, it seems my AD6641 module cannot get into the FILL mode by an unknown reason.

I always get 0x04 when reading 0x10A (FIFO status) register, which means over-range.

But there is no explanation about over-range, and I even don't know what causes this phenomenon.

Is there any workaround to solve this problem, or is it a kind of hardware issue?

Any suggestions would be much appreciated.

Best Regards,


  • Hello, David!

    Thank you for your answer, and currently, I'm using an AD6641 chip as a part of our module.

    The simplified schematic for the chip is like below.


    As you can see, I added 65MHz clock to AD6641 and control it using GPIO from CC3220S (WIFI module of TI).

    I found that basic SPI operations work well, and the below is my test code and comments to help you understand.

        uint8_t status = 0;

        uint16_t i;

        int n = floor(NUM_SAMPLES / 64) - 1;


        // Soft Reset doesn't seem to work.

        SPIwrite(0x00, 0x3C); // Soft Reset

        status = SPIread(0x00);


        // The flags do not return automatically.

        SPIwrite(0x00, 0x18); // Soft Reset

        status = SPIread(0x00);


        //SPIwrite(0x102, 0x0C); // Dump, Fill Reset -> This does not work in my case.


        SPIwrite(0x102, 0x04); // Fill Reset

        SPIwrite(0x102, 0x08); // Dump Reset

        // Reset flags don't automatically return to 0 in my case.


        status = SPIread(0x102);

        status = SPIread(0x101);


        GPIO_write(PIO_CLOCK, HIGH); // Enable CLK


        SPIwrite(0x104, n); // Write the Number of samples.

        SPIwrite(0x101, 0x01); // Initiate FILL


        //SPIwrite(0x102, 0x01); // Initiate FILL -> This does not work in my case.


        // There's no EMPTY flag on 0x10A register before the first FILL and DUMP.

        status = SPIread(0x10A); // Wait for FULL

        while(!(status & 0x01)) {

            status = SPIread(0x10A);



        SPIwrite(0x102, 0x02); // Initiate DUMP


        i = 0;

        while(!(status & 0x02)) {

            uint8_t lowByte = SPIread(0x10B);

            uint8_t highByte = SPIread(0x10C);

            arrData[i] = highByte << 8 | lowByte;

            status = SPIread(0x10A);





        GPIO_write(PIO_CLOCK, LOW);


        SPIwrite(0x101, 0x00);

        SPIwrite(0x102, 0x00);



    I have three specific questions after some tests.



    1. I've checked some weird operations as bold texts on the code above. Are they intended ways to control AD6641?


    2. It seems when I set DUMP, the speed of CLK affects the data to be dumped. I mean, If I read slower than CLK, the data are deleted. Do I have to slow down the Clock speed to read every data?


    3. It seems if I don't keep Dump Reset on 0x102 register, FILL does not start after setting <Stand by after fill> flag on 0x101 register. Is it a bug, or any other reason it works like that?



    Thank you for your help in advance, and I think there are pretty many weird phenomena.

    Any suggestions would be much appreciated.

    Best Regards,


  • hello,

    Did you find a solution to that problem?
    I get the same error. My chip is always stuck on over-range in 0x10A.

    The empty and the full are always inactive.



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