AD9629 linearity error

Hello, am using on my custom design an AD9629 used in differential mode.

It is working, however there are error when I applied a DC voltage from a differential ADA4940. there is some error on the conversion.

VIN+      VIN-     (Vin+-VIN-)    ADC value therorical value    real value
0,4073    1,3615    -0,9542        95                   49
0,4331    1,3353    -0,9022        202                 153
0,4835    1,2832    -0,7997        413                  372
0,5339    1,2310    -0,6971        625                  588
0,5850    1,1790    -0,5940        838                  800
0,8782    0,8748    +0,0034        2070                2055
1,1452    0,5985    +0,5467        3192                3194
1,3273    0,4103    +0,917          3956                3972

The sample frequency is 5MghZ, DCO shows the correct frequency
VCM is correctly decoupled with 100nF & 1uF
The pcb is a 6 layers with a ground plane.
RBIAS is 10K
Vref is stable at 0.9925V ( internal)

I have no clue why there is such an error between the theoritical value and the value measured.

I have change the SPI register USR2 ( 0x101) to 0x8C with no success.

Does anyone why differential ADC has such poor linearity?

thanks in advance for any suggestions.

  • 0
    •  Analog Employees 
    on Dec 20, 2017 9:15 AM

    Hi CrazyFrog,

    Thanks for using the AD9629. Here are my comments.

    • The VIN+ and VIN- voltages were measured right at (or close to) the ADC pins, correct?
    • I notice that the VCM at the ADC inputs starts to droop as the input amplitude increases. I'm not saying this is the cause, but I am curious about this. Is the amplifier VOCM staying constant?
    • The deviation of the real value and theoretical value (your data) 65 codes (maximum positive deviation minus most negative deviation). This is not necessarily non-linearity. Offset error and gain error also contribute to this. Typical gain error is -1.5%. 1.5% of 2^12 is greater than 60 codes. This could be a major contributor to what you are seeing.
    • When I compare your real values with perfectly linear data of the same slope (gain), the deviation from theoretical is from -2 codes to +3 codes, which is still greater than expected but much smaller than the deviation you are seeing.
    • One LSB is less than 0.5mV, so accurate measurements are important.
    • I noticed that CLK- goes through Zener diodes from the transformer on its way to the ADC clock pins. I'd think this would have a detrimental effect on the clock as seen at the ADC. If the diodes are for clipping voltage excursions, I believe they should be configured differently. This is a side issue that probably does not effect what you are seeing.

    Are you more concerned with the gain-error, or non-linearity?

    Thanks,

    Doug

  • thanks for yours comments,

    • The VIN+ and VIN- voltages were measured right at (or close to) the ADC pins, correct?

        Yes, with scope and a FLUKE 289 RMS

    • I notice that the VCM at the ADC inputs starts to droop as the input amplitude increases. I'm not saying this is the cause, but I am curious about this. Is the amplifier VOCM staying constant?

    Yes it's rock steady for the whole scale.

    • The deviation of the real value and theoretical value (your data) 65 codes (maximum positive deviation minus most negative deviation). This is not necessarily non-linearity. Offset error and gain error also contribute to this. Typical gain error is -1.5%. 1.5% of 2^12 is greater than 60 codes. This could be a major contributor to what you are seeing.

    Indeed, it looks like that it is problem. What would you recommend to do? do I need to have in my software a compensation coefficient? I can swap with a AD9649-20 but this will increase the cost.

    Can I get this compensation with the BIST of the device? Or can I use the device BIST to get valuable informations?

    • When I compare your real values with perfectly linear data of the same slope (gain), the deviation from theoretical is from -2 codes to +3 codes, which is still greater than expected but much smaller than the deviation you are seeing.
    • One LSB is less than 0.5mV, so accurate measurements are important.
    • I noticed that CLK- goes through Zener diodes from the transformer on its way to the ADC clock pins. I'd think this would have a detrimental effect on the clock as seen at the ADC. If the diodes are for clipping voltage excursions, I believe they should be configured differently. This is a side issue that probably does not effect what you are seeing.

    I'll have a look into that. Thanks you.

    Am worried now with the gain error

    regards

  • 0
    •  Analog Employees 
    on Jan 3, 2018 10:34 AM

    Hi CrazyFrog,

    Happy New Year.

    Unfortunately the AD9629 gain error is not something that is adjustable within the part itself.

    AD9649 has about the same gain error as AD9249 in terms of %-of-full-scale, so that does not seem to be a solution. I also do not see how BIST would help with this.

    If you have the ability to compensate in your system software, that would be a solution. I think it will have to be a system level solution to get past this issue.

    Thanks,

    Doug