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Why AD9864 output is noise when input IF signal is -90dBm

Our product is using AD9864, by out test, when the input IF signal with level of -90dBm directly into AD9864, and the DSP capture AD9864 SSI output IQ data then draw it with Matlab, the data is almost noise, we can't see valid signal. For -70dBm input or -30dBm input, the IQ data looks ok.

So, what's the possible reason for my problem, hardware or AD9864 configuration issue? Could anyone help me? Also I want to know what's the smallest input level that AD9864 can accept.

Here is my AD9864 register setting. And my IF input freq is 73.35MHz, LO freq is 71.1MHz.

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  • FormerMember
    0 FormerMember
on Apr 13, 2018 3:35 PM

Hello,

Difficult for me to decipher sequence.  

The AD9864 provides constant gain in the region where the AGC is not active.  When AGC is active (i.e. 12 dB ATTEN portion only), the AGC will reduce the internal analog gain by 12 dB during the AGC operating range. Once you run out of ATTEN range.........you should see a dB per dB increase in the FUND power (on FFT) as you increase the IF input.

If you are trying to estimate the IF absolute input power than you will need to consider the AGC setting  along with the FUND power in the FFT.  

Page 34 of datasheet 2nd Column

A linear estimate of the received signal strength is performed at
the output of the first decimation stage (DEC1) and output of
the DVGA (if enabled), as discussed in the AGC section. This
data is available as a 6-bit RSSI field within an SSI frame with 60
corresponding to a full-scale signal for a given AGC attenuation
setting. The RSSI field is updated at fCLK/60 and can be used
with the 8-bit attenuation field (or AGCG attenuation setting)
to determine the absolute signal strength. Note that the RSSI data
must be post filtered to remove the ac ripple component that is
dependent on the frequency offset relative to the IF frequency.

Regards.

Reply
  • FormerMember
    0 FormerMember
on Apr 13, 2018 3:35 PM

Hello,

Difficult for me to decipher sequence.  

The AD9864 provides constant gain in the region where the AGC is not active.  When AGC is active (i.e. 12 dB ATTEN portion only), the AGC will reduce the internal analog gain by 12 dB during the AGC operating range. Once you run out of ATTEN range.........you should see a dB per dB increase in the FUND power (on FFT) as you increase the IF input.

If you are trying to estimate the IF absolute input power than you will need to consider the AGC setting  along with the FUND power in the FFT.  

Page 34 of datasheet 2nd Column

A linear estimate of the received signal strength is performed at
the output of the first decimation stage (DEC1) and output of
the DVGA (if enabled), as discussed in the AGC section. This
data is available as a 6-bit RSSI field within an SSI frame with 60
corresponding to a full-scale signal for a given AGC attenuation
setting. The RSSI field is updated at fCLK/60 and can be used
with the 8-bit attenuation field (or AGCG attenuation setting)
to determine the absolute signal strength. Note that the RSSI data
must be post filtered to remove the ac ripple component that is
dependent on the frequency offset relative to the IF frequency.

Regards.

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