AD9608 PN9 sequence

Hi Michal,

Thank you for using the AD9608. Would you please send a sample of the PN9 data you are getting from the AD9608?

Thank you.

Doug

Here is a file with the data I read. When I tried to read data with alternating checkerboard it looked correct, but it doesn't make me 100% sure that the pn sequence I read is correct too.

Hi Michal,

Unfortunately I have not been able to find an AD9608 part to try. Looking at your data, the code swing looks good but I have not been able to match/confirm your numbers yet.

If you could, would you please try looking at some of the other predefined test patterns to see if those look correct (in addition to the checkerboard)?

Also, would you please send the PN9 data from your calculations?

Thanks,

Doug

I attached samples and spreadsheet with my calculations, starting from the seed I have: 0x125, 0x2fc, 0x26a, 0x198. But there is no such sequence in my dump.

Hi Michal,

Thank you for sending the files. I agree with the way you have calculated the PN9 sequence. I have used that same method to match the PN9 for some other of our parts. I do not know why it is not matching for AD9608.

• Can you try putting the AD9608 into 2s Complement mode (Register 0x14 Bits[1:0] and see what difference that makes?
• I'll still try to find an AD9608 board to try.
• We might have to ask the designer if there is anything different in the AD9608 PN9 implementation, but it will probably take a long time to get an answer.

You are using the Analog Devices AD9608 evaluation board, correct?

Thank you.

Doug

Hi, Doug,

I attach also 2s Complement samples. Unfortunately we don't have AD9608 evaluation board, we have our own custom PCB. Generally the design is working, when I'm sending known signal from generator and read the samples they are correct. Its not the first board we created with AD9608 (or similar) but here the data is send to FPGA through connector and I want to make sure that the transmission will still be correct for higher sampling speed, and for that it would be best to use PN sequence. I'll try with PN23, I'll also check one of our older boards with AD9608 if they behave the same.

Michal

Hi Michal,

It interesting that the values created in your calculated PN9 values (pn9_seq_gen.ods) appear in the captured values (pn9_seq.txt), though the order seems to be random in the capture values compared to the calculated. The repeat intervals are correct in the captured values, but the order is wrong.

I calculated additional PN9 values and they also appear in the captured outputs.

Can you verify how you are reading the data from the FPGA? is it possible that memory addressing is somehow a little off? I think it is more than a coincidence that the calculated theoretical PN9 values appear in the captured outputs.

Thank you.

Doug

Hi,

Yes, that is suspicious, so to eliminate as many potential errors as possible I connected logic analyzer directly after first interface stage inside FPGA. I attach schematic, adc_data_n/p are LVDS signals from ADC, and I connected logic analyzer to adc_data_0/1. The sequence I see is consistent with what I got before. I also attach registers dump from AD9608 configuration I use.

Thanks,

Michał

Hi Michal,

For some reason I cannot read ad9608_reg.txt . Could you please resend it? Also, do you have a schematic of the ADC portion that you can share?

Thank you.

Doug