AD9629 Read

Hi,

The sample FPGA code has been sent. I hope this gets you going.

Take care.

Doug

Hi Doug,

Thank you very much for your help. I had an opportunity to review the code right now. I have some questions about the code.

1. You wrote the code for AD9649. This is a 14 bit resolution ADC. But the data input of the code is 15 bit. What is the reason of this? And what is the function of ADC_MAX_DATA_SIZE(16 bit)?

2. Did you monitor the output data via USB? Am i right?

Best regards.

Hi HrnTtk,

I am not the author of the FPGA code, so I do not know the details or specifics. I can provide some guesses.

1. The objective is to capture all the digital outputs of a given ADC. Once captured, the software can decide which bits are valid for a particular ADC, whether it be 14bit, 12bit or 10bit. So from this perspective, the code allowing for a >14bit capture does not seem to me to be a problem.
2. The captured data is transferred to the PC by USB. The software on the PC (VisualAnalog) interprets and processes the data. The AD9629 evaluation board works with the HSC-ADC-EVALCZ FPGA capture board. There is a USB controller chip on the HSC-ADC-EVALCZ FPGA board that handles the USB communication.

I do not know the function of ADC_MAX_DATA_SIZE(16 bit). From the sound of it, maybe it is setting the maximum limit of the code to capture 16 bit outputs.

Thank you.

Doug

Hi HrnTtk,

I am not the author of the FPGA code, so I do not know the details or specifics. I can provide some guesses.

1. The objective is to capture all the digital outputs of a given ADC. Once captured, the software can decide which bits are valid for a particular ADC, whether it be 14bit, 12bit or 10bit. So from this perspective, the code allowing for a >14bit capture does not seem to me to be a problem.
2. The captured data is transferred to the PC by USB. The software on the PC (VisualAnalog) interprets and processes the data. The AD9629 evaluation board works with the HSC-ADC-EVALCZ FPGA capture board. There is a USB controller chip on the HSC-ADC-EVALCZ FPGA board that handles the USB communication.

I do not know the function of ADC_MAX_DATA_SIZE(16 bit). From the sound of it, maybe it is setting the maximum limit of the code to capture 16 bit outputs.

Thank you.

Doug