AD9629 Read

Hi,

The sample FPGA code has been sent. I hope this gets you going.

Take care.

Doug

Hi,

The sample FPGA code has been sent. I hope this gets you going.

Take care.

Doug

Hi Doug,

Thank you very much for your help. I had an opportunity to review the code right now. I have some questions about the code.

1. You wrote the code for AD9649. This is a 14 bit resolution ADC. But the data input of the code is 15 bit. What is the reason of this? And what is the function of ADC_MAX_DATA_SIZE(16 bit)?

2. Did you monitor the output data via USB? Am i right?

Best regards.

Hi, 

I want to ask another question. Is it possible to do these operations with microblaze processor and IP cores?

Best regards.

Hi HrnTtk,

I am not the author of the FPGA code, so I do not know the details or specifics. I can provide some guesses.

1. The objective is to capture all the digital outputs of a given ADC. Once captured, the software can decide which bits are valid for a particular ADC, whether it be 14bit, 12bit or 10bit. So from this perspective, the code allowing for a >14bit capture does not seem to me to be a problem.
2. The captured data is transferred to the PC by USB. The software on the PC (VisualAnalog) interprets and processes the data. The AD9629 evaluation board works with the HSC-ADC-EVALCZ FPGA capture board. There is a USB controller chip on the HSC-ADC-EVALCZ FPGA board that handles the USB communication.

I do not know the function of ADC_MAX_DATA_SIZE(16 bit). From the sound of it, maybe it is setting the maximum limit of the code to capture 16 bit outputs.

Thank you.

Doug

Hi HrnTtk,

I'm sorry but I do not know the capability of the MicroBlaze compared to the Virtex4 on the HSC-ADC-EVALCZ for AD9629 capture.

I can ask one of our FPGA developers for their opinion on this, but of course we cannot guarantee any capability, compatibility or result.

Thanks.

Doug

Hi HrnTtk,

Hi Doug,

I am trying to read AD9629 and i want to ask some questions. 

This is my circuit. Analog input range(Pin-9) of AD8475 is 0 to 4.2V. ADC inputs become 0.46V and 1.34V when AD8475 input is 0.29. And digital output of the ADC is 8D5. This value is true?

What should be the relationship between input values and output? 

I can't understand this table. What is the meaning of this?

Thanks for help.

Hi HrnTtk,

To verify you capture the ADC outputs properly, I recommend that you use the output test patterns controlled by Register 0x0D Bits[3:0]. For example, to output a checkerboard pattern you would do the following SPI writes:

Write Register 0x0D = 0x04
Write Register 0xFF = 0x01

This will put AD9629 in output checkerboard test mode. There are several other test patterns to choose from. Please see Table 16 in the AD9629 datasheet for more options.

Table 12 in the AD9629 datasheet shows the output values for a few selected voltage values at the analog input. I numbered them in the picture above to match the numbers in the description below.

1. This shows the value when the differential voltage at the ADC inputs are less than the negative full scale value. This means that the VIN+ - VIN- is less than 1V by more than 0.5LSB. The output is a minimum code and the MODE/OR pin goes high, if the MODE/OR pin is in OR mode.
2. This is when the differential input voltage is right at the negative full-scale value (VIN+ - VIN- = 1V). The ADC outputs the minimum code. OR does not go high.
3. This is with VIN+ = VIN-. When the voltage on each input are equal to each other, the differential input voltage is zero. In this case the ADC outputs a mid-scale code.
4. This is with the differential input voltage at full-scale. The ADC outputs a maximum code value.
5. This is with the differential input voltage above full-scale. The ADC outputs a maximum code value and the OR pin goes high, if the MODE/OR pin is in OR mode.

Does this answer your question?

Thank you.

Doug

Hi Doug,

In offset binary mode and second condition(Vin+ - Vin- = -1V), i am reading 800H. I check the DFS pin and it is logic zero. So the output mode of ADC is offset binary. But it gave an output according to the 2's comp. mode in second condition. What can be the problem?

Best regards.

Harun

Hi Harun,

Is your CSB pin connected to DRVDD to put the AD9629 in "pin mode" (non-SPI mode)?

Thank you.

Doug

Yes, my CSB pin connected to DRVDD.

Thank you.