LTC2323 digital interface CNV

Hello,

We are controlling the LTC2323 from FPGA and we want to sample the data with 5 MSPS ind LVDC mode.

In the datasheet (last page) it is somehow written, that for the CNV pin a additional FlipFlop should be used.

But why? What would be the advantage?

Can we control it directly from our FPGA?

thanks

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    •  Analog Employees 
    on Oct 7, 2020 1:19 PM 4 months ago in reply to PL99

    I am not an expert on the internals of an FPGA so I cannot give you a good answer as to what the difference would be. Also, depending on the BW of your signal and the FPGA you are using, the external flip flop may not be necessary. The best design practice is still to use the flip flop to minimize jitter at the CNV input of the ADC.

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