LTC2183 CLKOUT timing afer first ENC input

Hello

I am FAE in Japanease distributor.

I asked this question 23rd in December.

Could you answer this question?

ur customer uses LTC2183 with ENC=80MHz, SCK=2MHz.

They writes data 02h to address 03h  for reset  by SPI after power on.

Then they writes data 02h to address 03h for CMOS DDR mode setting by SPI .

CLKOUT signal starts to output 1us after ENC signal inputs.

Is this 1us a normal time?

Why is this time needed? (DLL or PLL locktime?)

Our customer confirmes address 01h data 00h and address 03h data 02h.

Best regards

N.Kokubo

There are a few things, yes there is an internal PLL, and also there is time required for the internal reference to settle. 

There are a few things, yes there is an internal PLL, and also there is time required for the internal reference to settle. 

Hi Clarence san

Thank you for your reply.

My customer CLKOUT signal starts to output abou 423ns after ENC signal inputs ENC=80MHz, SCK=2MHz.

Is this 423ns  a resonalble time?

Best regards

N.Kokubo

Data will start coming out in about 100clock cycles. But the reference takes about 2ms to settle.  If they are coming of sleep mode, or turning the IC on then they will need to wait 2ms before data coming out is valid.

Hi

Thank you for the answer.

I close this question.

Best regards

N.Kokubo

Great, let me know if you have any other questions.