Actually, I‘m using Kintex UltraScale FPGA KCU105 Evaluation Kit and ADC9695. I want to control the ADC only on the PL using this method: I’ve made an IP “myip_v1.0” (Figure1) with AXI4 interface (master). It sends data control (32 bits) through the AXI Quad SPI (on the SPI Data Transmit Register (Core Base Address + 0x68)) so that it can be able to configure the registers of the ADC (Figure2).
My problem is that the SPI sends the data to the ADC but it has a loopback and I get the same data that I have already sent. The loopback of the SPI is set to 0 (I’ve configured the SPI Control Register (Core Base Address + 0x60) with 0x0006). Indeed, to check the loopback is disabled, I’ve send data through the SPI without ADC so I didn’t get any data in the SPI Data Receive Register (Core Base Address + 0x6C).
Please can you help me understand the source of this problem and how can I fix it.
Thanks in advance.