We have a problem with our AD9681-125EBZ board (01-039100, REV B). We are using it with the Digilent Nexys Video FPGA board. When sampling very low power signals, the ADC works as expected. But when sampling signals closer to the full scale, the noise floor raises significantly (together with the harmonics). Effectively we have at most 8 bits worth of signal and SNR close to 50 dB instead of the 74 dB specified in the datasheet. See the image at the bottom.
- We have tried different signal generators (e.g., HP E4433B) and actually we expect all of them to have better SNR. Didn't notice any difference when changing the generators.
- We have tried the on-board external voltage reference and the internal voltage reference.
- We have tried using laboratory power supplies instead of the adapter that was shipped with the evaluation board.
- We have tried using external GPS driven TCXO 125 MHz reference.
- When sending the long PN sequence from the ADC to the FPGA, no data loss occurs and the PN from ADC exactly matches the locally generated PN code.
- We have implemented the digital reset after power-up that has been suggested.
- We have tried different frequency input signals hoping that the on-board crystal oscillator jitter is perhaps the reason behind poor performance. However, the noise floor remains unchanged.
Unfortunately none of the above have seemed to improve (or worsen) the effect. Thus, we would greatly appreciate any comments/ideas on how to proceed and get results closer to the specified ones.