[AD9262] ADC Stop during operation

Thanks in advance for my question.
I use the AD9262.
Use according to the guidelines (Table 9.).
The chip ID reads 0x22 well through SPI, and the value I set is well written and read.
CLK uses 52MHz, MUX uses 25, and KMOD uses 13 to generate a DCO of about 100MHz.
The input signal (Tone, 1MHz, -20dBm) is applied to capture well.
However, the ADC chip is reset at some point during input signal removal or operation.
Why does this happen?
Attach the picture of normal operation and picture of reset operation when removing signal.
Please help me.

[normal register read]                                [normal signal capture]

[remove signal (VIn), reset resigster]          [remove signal (VIn), signal capture]