1、What is the correct starting sequence for this new product AD9633?Is it necessary to set SPI before sampling?
2、What's the difference between these two models：bitwise and bytewise?
3、Why are DCO clocks divided into DDR and SDR? Does this need to be set in SPI?
How do I set Pins without setting SPI？
hello,firstly,Thank you for your patience to answer my questions,and The chip AD9633 is still not working properly.as shown in the figure above,The main controller fpga sends the read command, the address…
Thank you for your patient answer. I observed the waveform with an oscilloscope and tested it with 100 ohm matching resistance at the backend. I found that the amplitude of fco was 2.5v, but the amplitude…
The AD9633 has two modes, 1XFrame mode and 2XFrame mode.
When are these two modes used?
After power on, can it work directly without SPI setting?
Thank you for your interest in AD9633.
1. If the sample clock is stable when the AD9633 is powered on, no startup sequence is needed. If there is any doubt that the clock is stable at AD9633 power up, it is safest to perform a Digital Reset as described in the CLOCK STABILITY CONSIDERATIONS section of the AD9633 datasheet.
2. Figure 2 in the AD9633 datasheet shows both bitwise and bytewise output modes. Bitwise output mode has consecutive bits from MSB to LSB alternating back-and-forth between lanes. Bytewise output mode has consecutive bits from MSB to LSB all in one lane and then the other lane. Figure 2 graphically shows this better than I can explain in words.
3. DCO is either DDR or SDR both are shown in the timing diagram for illustration purposes. This can be set by SPI Register 0x21 Bits[6:4]. DDR is default. DDR clocks data both rising and falling edges. SDR clocks data only on the rising edge.
Output Frame Mode is user preference. 1X Frame mode is default. It can be changed to 2X Frame mode with SPI Register 0x21 Bit2.
thank you for your reply,and i have some questions below:
Address a12-a0 in SPI, where a0-a11 corresponds to the address in the table, and A12 does not see the relevant description in dastasheet.
Address bit A12 remains 0, okay?
I'm sorry but I do not understand the question. What are the "Address a12-a0 in SPI"?
Please add additional explanation.
I'm sorry about this,
I mean the address header in the sdio signal of spi,as shown in the following picture: