We have been using the AD9213 with the ADS-V8 FPGA card. Until recently I had been running with the DDC off, full BW mode with no issues. I have begun to characterize the part with the DDC in decimate by 2 mode, 2 virtual converters to convert to complex. With N' = 16 things program fine on the ADC and the FFT analysis tool works great. With N' = 8, same thing, works great. With N'=12, no matter what the sample rate is, etc, the ADC appears to accept the settings but when I go to the Analysis tab and attempt to capture, the analysis tool sits there attempting to capture until it hangs up. I can't ever get a capture with N' = 12. Is there a solution to this or any suggestions on something else I could try?
With N' = 12, there are limited lane count (JESD204B L parameter) options. You must use L = 3, 6 or 12 with N' = 12. Might this be the cause of what you are seeing?
Please see Table 25 in the PrG version of the datasheet on analog.com.
Does this make any difference?
Thanks Doug, did the trick!