EVAL-AD9670 CW Doppler Issue

Hi, 

I'm using the EVAL-AD9670 w/ the appropriate data capture board (HSC-ADC-EVALCZ). I'm trying to test the CW Doppler functionality of the chip by connecting one function generator to the LO SMA (5MHz, 1Vpp, sine wave), another fgen to the Channel A SMA (1.26MHz, 1Vpp, sine wave), and a scope to the I & Q SMAs. I would expect to see two 10kHz sine waves on the scope, with the phase delay as specified by SPI Register 0x02D. Instead, I see this:

Not quite what I'm looking for! Besides being horribly noisy and only vaguely sinusoidal, the frequency isn't close to the expected 10kHz. I also cannot control the phase shift, though I can swap the I and Q outputs using register 120. Lastly, the amplitude of the signal grows as I increase the ChA frequency. Weird.

Is there a setting I'm missing somewhere? 

I have the registers set as follows: Chip Power Mode = CW mode, LO Mode = 4LO, and ChA is enabled.

I also tried tying the CW Reset SMA to the MLO function generator, but it made no difference.

Thanks for your help!

Parents
  • +1
    •  Analog Employees 
    on Jun 11, 2019 3:55 AM

    Hello,

    1Vpp is too high if you are using the default LNA gain setting (21.6dB). The max input is 333mV in this setting and the LNA will saturate (clip) after. Try to decrease the input voltage level to avoid saturation.

    Also, the phase shift between I & Q will always be 90 deg. Register 0x02D controls the phase shift between different channels (I vs I & Q vs. Q).

Reply
  • +1
    •  Analog Employees 
    on Jun 11, 2019 3:55 AM

    Hello,

    1Vpp is too high if you are using the default LNA gain setting (21.6dB). The max input is 333mV in this setting and the LNA will saturate (clip) after. Try to decrease the input voltage level to avoid saturation.

    Also, the phase shift between I & Q will always be 90 deg. Register 0x02D controls the phase shift between different channels (I vs I & Q vs. Q).

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