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The schematic diagram is as follows, the signal is introduced from the part, and enters the AD signal input terminal after the differential chip TH4551. The AD chip is digitally and separately powered from the analog ground. The AD analog power supply and differential chip are powered by the MAX17651 module and the 5V power supply. The 10M clock chip (CB3-3C-10M0000) and the AD digital power supply are powered by an external 5V power supply.

Chip PCB layout as shown below.

An external STM32F104 core board is used for debugging. The problem that arises is that if only the AD analog power supply and the differential chip are powered, the AD chip reference voltage Vref will not exhibit noise, as follows.

When all the parts are fully powered, the noise of the AD chip reference voltage Vref appears, and the noise of the 5V voltage stabilized by the MAX17651 is also solved.

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