AD9601 connected to a processor to handle high speed

Hi, 

Yes, it is normally interfaced to a high speed FPGA (we used Virtex 4 from Xilinx) or a high speed ASIC which can receive and process the data in real time.  

Regards, 

David

Hi ,

Thanks much and could you please put up the configuration as how you connected ADC to FPGA which would be of great help.

Hi, 

The AD9601 shares an evaluation board with the AD9626 and the AD9434.  It interfaces to an FPGA on the HSC-ADC-EVALCZ used for data capture in the evaluation system.  You can find the pinout of the AD9601 to the interface connectors between the boards (P501, P502) on page 25 of the AD9601 data sheet. The mating connectors are in the schematic of the HSC-ADC-EVALCZ found on page 13 of this user guide: 

https://www.analog.com/media/en/technical-documentation/user-guides/UG-290.pdf

Note, the AD9434 is an LVDS device, the AD9601 is a CMOS device.  You will need to map out the interface from the AD9601 in this schematic to the FPGA.  I know this is inconvenient, but it is the best I can help with given the available documentation. 

As far as designing the FPGA code, I do not see that ADI has reference code available.  You would need to develop your own code using the Xilinx tools.  

I would like to point you to a more complete solution, but we do not have that available.  

Regards, 

David

https://www.analog.com/media/en/technical-documentation/user-guides/UG-290.pdf

Note, the AD9434 is an LVDS device, the AD9601 is a CMOS device.  You will need to map out the interface from the AD9601 in this schematic to the FPGA.  I know this is inconvenient, but it is the best I can help with given the available documentation. 

As far as designing the FPGA code, I do not see that ADI has reference code available.  You would need to develop your own code using the Xilinx tools.  

I would like to point you to a more complete solution, but we do not have that available.  

Regards, 

David