AD9653 Channel D problem


I am debugging AD9653 with Artix-7 FPGA and referenced the ADC_interface supplied by XAPP524.

The input of the signal is a sine wave which is fed by a signal generator. The outputs of each channel are monitored with a ILA in Vivado after the signals are deserialized in ADC_interface. The outputs of three channels, channel A, B, C,  work well. But channel D doesn't show the right value range compared with other channels even though it received the sine wave. It seems that the highest one or two bits are always unavailable, like the picture below. 

I tried to use test mode and it worked fine for all channels, in other words, the four channels could receive the same data that is generated by ADC.

The analogy inputs (refer to Fig.57 in AD9653 datasheet) are also checked, the parameters of the analog input are the same, and the amplitude and bias (from VCM, 0.9V) of input sine wave are the same as well.

Then what should I do to figure out the problem?

Thanks in advance.