hi , how to configuration the test mode to validation the communication from ADC to FPGA ?
gave me some guidance pls.
Thank you for your interest in AD9613.
As shown in your attachment, the AD9613 test modes are controlled by Register 0x0D . The different test patterns available are described in the table, and controlled by Bits[3:0].
For example, to output the checkerboard test pattern, you would do the following register writes:
Write Register 0x0D = 0x04; #select checkboard test pattern
Write Register 0xFF = 0x01; #issue a transfer command to put previous SPI actions into effect
Please give this a try and let us know how it goes.