My team is interfacing with the AD9257 and we have got the demo board, but we need to interface with a custom FPGA setup. Is there some IP already created for the AD9257 like there is for the AD9265 found in this repository?:
Thanks for your interest in AD9257. Here is an example of the FPGA code (written for Xilinx Virtex4) we use to capture outputs of parts like the AD9257.
This is provided freely, as-is, and with no warranty.
I hope your project goes well.
I'm also curious, could the ad9265 or other HDL code in the repo be modified by simply changing the 16 bits to 14 bits throughout the code?
I'm not an FPGA developer so I cannot say for sure. Many of the FPGA programs that our team has developed works for multiple resolutions for parts in a similar family.
The type of clock signals and their timing relationship to data is important.
If all such variables are the same and the only difference is the resolution (number of bits), what you say sounds reasonable but again I cannot really say.
I'm sorry I don't have more information.
Is there a way I can see what ADC are all in the same family?
FYI I'm out-of-the-office tomorrow but will return on Friday.