ADL5569 S-par and Match

What is the correct way to utilize the ADL5569 Sparameters? Why is there not more LC match between the ADC driver amps and ADCs - the ref circuits utilize resistance match that throws away gain.

I downloaded a ADL5569 Spar file into Genesys - it is a 4 port files; ports 1&2 are INPUT, Zo=100Ohms;  ports 3&4 = output, Zo=14Ohms. In Genesys, I connected a 1:2 balun at the input to step 50 to 100Ohms; for output , I used LC match from 14 to 50 Ohms.  Results were reasonable; < -12dB S11, S22 at both ports over  220-400M, and flat gain = 22dB. Seems to me a higher gain alternative than the typical reference circuit. So, is there a catch - e.g can the driver amp output 2dBm (ADC full scale) while looking into 14 Ohms?

  • I plotted the S-par file, with a 1:2 balun at input stepping 50 to 100 Ohms; and the reverse at the output - (0.5:1) stepping 50 Ohms @ output port down to 25 Ohms across the ADL5569 output. This reproduces the gain per fig 3 of data sheet - flat 19.3dB, with peaking @ 2.2G. I have no other matching components besides the IN/OUT balun. 

    Over 200-400M, S11 is fine < -20dB; but S22 is really high  -2.5 dB equiv to (7.5+j*3) Ohms. I need it to drive a BPF before the ADC; I do not want to simply add a series R to raise 7.5 Ohms to 50Ohms - that is too much loss.

    Am I interpreting the Spar data correctly ??

  • 0
    •  Analog Employees 
    on Nov 8, 2018 8:40 PM

    > What is the correct way to utilize the ADL5569 Sparameters?

    There is no one correct way that is equally applicable for all usecases. Some applications may require data not present in the file, like higher resolution or certain discrete frequencies, without which the interpolation between points may result in non-physical behavior. Also, please keep in mind that S parameters imply a linear system, but active circuits are rarely purely linear. Thus, simulation errors are unavoidable, and have to be dealt with on a case by case basis.


    > Why is there not more LC match between the ADC driver amps and ADCs - the ref circuits utilize resistance match that throws away gain.

    Matching an ADC and amplifier is not straightforward impedance matching. ADCs are fundamentally voltage-based devices rather then power-based parts, like antennas for example. In fact, for voltage-based circuits sometimes it makes sense to intentionally mismatch circuits just to get a higher voltage swing on the load/receiver - or ADC in this case. Secondly, ADCs are switched-cap devices, meaning that the load they represent may vary with time, and the switching action will lead to voltage spikes on the input known as kick-back. Contemporary ADCs try to mitigate this effect by having buffers on the input, however the reverse isolation of these buffers is limited. Hence, series R and shunt C components may be necessary to filter these pulses. This is why the input network between ADCs and amplifiers can get quite complicated and may very well sacrifice signal strength to improve linearity. We test our ADC input networks extensively to provide good performance (SFDR, SNR) compromise for a wide variety of usecases, however, for a particular application an LC match might very well be better. That is something the designer of that particular system has to establish.

    Please, see the following documents for more details:
    AN-827 www.analog.com/.../577685821057469457705578853404381574892535191189340957AN_827_0.pdf
    AN-742
    www.analog.com/.../587173998057911564087081655730496713845335290374441083AN_742_a.pdf
    www.analog.com/.../radically-extending-bandwidth-to-crush-the-x-band-frequencies.pdf

    > I downloaded a ADL5569 Spar file into Genesys - it is a 4 port files; ports 1&2 are INPUT, Zo=100Ohms; ports 3&4 = output, Zo=14Ohms.
    > In Genesys, I connected a 1:2 balun at the input to step 50 to 100Ohms; for output , I used LC match from 14 to 50 Ohms. Results were
    > reasonable; < -12dB S11, S22 at both ports over 220-400M, and flat gain = 22dB. Seems to me a higher gain alternative than the typical
    > reference circuit. So, is there a catch - e.g can the driver amp output 2dBm (ADC full scale) while looking into 14 Ohms?

    Please verify Noise Figure, SFDR, SNR, and any other parameters you find important for your design. This likely requires an actual build-up of the circuit. If you find the parameters satisfactory and don't violate absolute maximum ratings, the configuration is the optimal for your particular usecase.

  • 0
    •  Analog Employees 
    on Nov 8, 2018 8:41 PM in reply to Des_coghlan

    You are interpreting the data correctly. The output resistance of the ADL5569 is 14 Ohms, not 50 Ohms. Furthermore, over the range you are interested in, the output is highly inductive as well, as seen on Figure 37 in the datasheet. Please take that into account as you design your BPF for impedance matching. Unfortunately, it is likely to lose some gain when matching circuits.