Post Go back to editing

High Resolution FFT Solution

Hello,


I am working in a group at UC Davis developing a dark matter detection experiment. We would like to implement a 67 million-channel, real-time FFT processor over the 30–1000 MHz range. The proposed signal would be monochromatic and have a very high Q (~10^6) and would take up about one bin in our high resolution FFT. Because our proposed signal is buried deep in the system noise, we leverage its monochromaticity by averaging many acquisitions together  (about 10 FFTs/sec for one year ~10^8 averages). Because of this we require very low level spurs since they mimic the candidate signal.


We are currently using an open-source, stand-alone FPGA board coupled to an ADC for our data acquisition. One main issue we have run into with this setup is that we are seeing many spurs of an unknown origin whose frequency and amplitude are unstable in time. We have unsuccessfully troubleshot our setup and are now looking at other DAQ options.


Since our candidate signal is so low-power, we require very low-power spurious artifacts. Furthermore, we would like the spurs that we do see to be stationary. In this way, we can come up with methods to reliably remove them.


The rest of this post contains specific questions about product offerings with this application in mind.


-  We suspect that one source of our spur problem may be related to spurs in the clock signal as outlined in this Texas Instruments document https://www.ti.com/lit/pdf/slyt338?keyMatch=SAMPLING-CLOCK%20SPURS<https://urldefense.com/v3/__https://www.ti.com/lit/pdf/slyt338?keyMatch=SAMPLING-CLOCK%2a20SPURS__%3bJQ%21%21A3Ni8CS0y2Y%21qArLyA1XC6YGK4g1bX9kSw5fUCG03ZgdPm632bZqKa-a2ak0rIuBNO4VSxeTtFbuPw$<https://urldefense.com/v3/__https://www.ti.com/lit/pdf/slyt338?keyMatch=SAMPLING-CLOCK%2a20SPURS%2a3Chttps:%2a%2aAurldefense.com%2av3%2a__https:%2a%2aAwww.ti.com%2alit%2apdf%2aslyt338%2akeyMatch=SAMPLING-CLOCK%2a2a20SPURS__%2a3bJQ%2a21%2a21A3Ni8CS0y2Y%2a21qArLyA1XC6YGK4g1bX9kSw5fUCG03ZgdPm632bZqKa-a2ak0rIuBNO4VSxeTtFbuPw$__%3bJSUvLy8vLy8vLy8_JSUlJSU%21%21A3Ni8CS0y2Y%21o0wL0wUIqpPx_M_tenVi5zUzyjYYIXnee7ngSMTZtQmJmJbVuvoa32ysLEYlQpHM0g$>>.

Are there OEM solutions to get a clean clock signal to the ADC?


- We don’t need a large bit depth and actually prefer a slightly lower resolution because it produces less data. We’ve been using an 8-bit ADC for our proof-of-concept system. Do you think this is reasonable?


- We would like to take the data from the ADC and send it to a GPU on our PC to do our FFT. How do we integrate the system into our existing back end? Is software required to do this? If there is, can it run on Linux? Can we write our own script to quickly acquire raw ADC data for processing?


Thank you very much for your time