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Interfacing with lots of ADCs using LVDS



		

			

									
					    OliverSedlacek
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Mar 17, 2011 
				
			
			
		
    

				
		
    
		    		    
		    
		    	
			
    I need to process up to 24 ADCs, each running at 5-10MSPS. Each ADC needs to have 12 bit resolution, and the ADCs are spread over 3 PCBs. The AD9220ARS would do as a good economical 12bit ADC, but interconnecting 24 of them looks ugly. Quad or octal devices might be a way forward, but has anyone tried using LVDS interfaces to get the sheer number of interconnects down?
    
								
    

				
				
		
    
			
						
									
									
						
						
			
			
			
			
		
    

        
        

					
    
			
    


    


	
    
		
	
    















    
	
    
	
    
					



			








	
	
	
	



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      •  Analog Employees  
      
            
			                            
                        
                on Nov 24, 2011 5:42 AM
            
            
					
      
	
      

		
		
      
					
      Hi,
      
 
      We use a Virtex4 FPGA from Xilinx to capture the data of the AD9637.  These octal ADCs are used in systems where the channel count can be very high, such as 256 channel ultrasound systems, and FPGA or dedicated ASICs are the usual solution. 
      
 
      Good luck with your design,
      
 
      David
      
			
      

		
		
		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
				
				
						
				
				
		
		
      
			
		
      
	
      

      

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      •  Analog Employees  
      
            
			                            
                        
                on Nov 24, 2011 5:42 AM
            
            
					
      
	
      

		
		
      
					
      Hi,
      
 
      We use a Virtex4 FPGA from Xilinx to capture the data of the AD9637.  These octal ADCs are used in systems where the channel count can be very high, such as 256 channel ultrasound systems, and FPGA or dedicated ASICs are the usual solution. 
      
 
      Good luck with your design,
      
 
      David
      
			
      

		
		
		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
				
				
						
				
				
		
		
      
			
		
      
	
      

      

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