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JESD204B Survival Guide Published; Looking for Feedback

The first edition of the “JESD204B Survival Guide” was published recently and we’d really like to get feedback on it.  Check out the “JESD204B Survival Guide” here:

The 98-page PDF book (5MB) is free – no registration required - and provides practical, technical tips and advice about implementing JESD204B along with information on interfacing high-speed data converters with FPGA platforms.  The contents include the following articles written by ADI high-speed converter engineers:

-What Is JESD204 and Why Should We Pay Attention to It

-High Speed Converter Survival Guide: Digital Data Outputs

-JESD204B vs. Serial LVDS Interface Considerations for Wideband Data Converter Applications

-Grasp the Critical Issues for a Functioning JESD204B Interface

-Synchronizing Multiple ADCs Using JESD204B

-Three Key Physical Layer (PHY) Performance Metrics for a JESD204B Transmitter

-The ABCs of Interleaved ADCs

-New, Faster JESD204B Standard for High Speed Data Converters Comes with Verification Challenges

-Interfacing FPGAs to an ADC Converter’s Digital Data Output

-14-Bit, 170 MSPS/250 MSPS, JESD204B, Dual Analog-to-Digital Converter Data Sheet

The JESD204B Survival Guide can be found here:

Please let me know what you want to see in the second edition of the “JESD204B Survival Guide” and share your ideas.

  • Hi Maxim,

    Indeed HMC7044's delay options works well above the 1600MHz also, however that is not defined very well for all conditions. The main problem is; the step linearity with respect to frequency does not have a good specification. I mean increasing delay setting creates more delay always in the signal however its value is not same for different step settings, calibration can be required. We will measure these delay settings and define them soon.

    Please note that analog delay option may cause additional phase noise. We recommend using this delay option on SYSREF clocks and designing the PCB such that no delay option is required on CLKOUTs. Digital delay option has no effect on noise, it can be safely used.

    Adding another component between will create more complexity however with a good PCB design and by the help of HMC7044 features you can achieve the required synchronization.

    Best Regards,