Locale Icon
English
  • Forums

    Popular Forums

    • LTspice
    • Video
    • Power Management
    • RF & Microwave
    • Precision ADCs
    • FPGA Reference Designs

    Product Forums

    • Amplifiers
    • Clocks & Timers
    • Data Converters
    • Direct Digital Synthesis (DDS)
    • Energy
    • Interface and Isolation
    • MEMS Inertial Sensors
    • Power Management
    • Processors & DSP
    • Processors & Microcontrollers
    • Switches & Multiplexers
    • Sensors
    • Voltage References
    View All

    Application Forums

    • A2B Audio Bus
    • Audio
    • Automated Test Equipment (ATE)
    • Condition-Based Monitoring
    • Depth, Perception & Ranging Technologies
    • Embedded Vision Sensing Library
    • Motor Control Hardware Platforms
    • Precision Technology Signal Chains Library
    • Video
    • Wireless Sensor Networks Reference Library

    Design Center Forums

    • ACE Evaluation Software
    • ADEF System Platforms
    • Design Tools & Calculators
    • FPGA Reference Designs
    • Linux Software Drivers
    • Microcontroller no-OS Drivers
    • Precision Studio
    • Power Studio Designer
    • Power Studio Planner
    • Reference Designs
    • Robot Operating System (ROS) SDK
    • Signal Chain Designer
    • Software Interface Tools
  • Learn

    Highlighted Webinar

    Revolutionizing Flow Cytometry: 20-Bit Precision Signal Chain

    In this webinar, we will reassess the design of electronics for Flow Cytometry applications. In the past, 20-bit, 40 MSPS analog-to-digital converters...

    Places

    • ADI Academy
    • ADI Webinars
    • EZ Blogs
    • Video Annex
    • Virtual Classroom

    Libraries

    • 3D ToF Depth Sensing Library
    • Continuous-Wave CMOS Time of Flight (TOF) Library
    • Embedded Vision Sensing Library
    • Gigabit Multimedia Serial Link (GMSL) Library
    • Optical Sensing Library
    • Other Products Library
    • Precision Technology Signal Chains Library
    • Software Modules and SDKs Library
    • Supervisory Circuits Library
    • Wireless Sensor Networks Library

    Upcoming Learning & Events

    • COTS SoMs & Phased Array Solutions for Rapid RF Subsystem Integration
    • LEO Satcom: Application of RF, Mixed-Signal, & Beamforming ICs
    • 3 Real World Methods to Make Your Power Supply More Intelligent
    View All Webinars
  • Community Hub

    Challenge Yourself!

      KCC's Quiz AQQ300 about Divisibility by 6

      1. Quote of the month: " Friendship is like money - easier made than kept " - Samuel Butler 2. New quiz AQQ300 about a divisibility by 6 puzzle ...

    View All

    What's Brewing

      Read a Blog, Take this Quiz for Another Chance to Win a Gift Card!

      Important: Read the blog first . The quiz questions are all based on the content of the blog: Taming the AI Power Storm: Part 2 of 3 Test your...

    View All

    Places

    • Community Help
    • Analog Dialogue Quiz
    • Logic Lounge
    • Super User Program

    Resources

    • EZ Code of Conduct
    • EZ How To Help Articles
    • Getting Started Guide
    • ADI: Words Matter
    • Community Help Videos
    View All
  • ContentZone

    Visit ContentZone

    Search content by industry or technology.
    • Blogs
    • Technical Articles
    • Tutorials
    • Videos
    • Webinars
    Your ADI content all in one place.
    View ContentZone

    The Latest Read

    Clock Tree Design and Why “PLL Locked” Is Not Enough

    In high-performance RF systems, clocking architecture is a foundational element that directly governs signal integrity, synchronization, and overall system...

    New Release

    Signal Chain Designer: DC Error Simulation
    Signal Chain Designer: DC Error Simulation

    This video covers the DC error calculation capabilities of Signal Chain Designer. DC error is unique in that often requires calibration and has so many...

    Recent Technical Insights

    Latest Technical Article from Analog.com
    Multiphase Designs, Decisions, and Trade-Offs with Trans-Inductor Voltage Regulators

    This article illustrates how TLVR design choices affect performance parameters and discusses related trade-offs.

EngineerZone
EngineerZone
Direct Digital Synthesis (DDS)
  • Log In
  • User
  • Site
  • Search
OR
Ask a Question
Direct Digital Synthesis (DDS)
  • Data Converters
Direct Digital Synthesis (DDS)
Documents AD9957AD9910_Matched Latency Enable Bit
  • Q&A
  • FAQs/Docs
  • Members
  • Tags
  • Cancel
  • Documents
  • +AD5930: FAQ
  • +AD5932: FAQ
  • +AD5933: FAQ
  • +AD5934: FAQ
  • +AD9152: FAQ
  • +AD9830: FAQ
  • +AD9832: FAQ
  • +AD9833: FAQ
  • +AD9834: FAQ
  • +AD9835: FAQ
  • +AD9837: FAQ
  • +AD9838: FAQ
  • +AD9840: FAQ
  • +AD9840A: FAQ
  • +AD9845A: FAQ
  • +AD9850: FAQ
  • +AD9851: FAQ
  • +AD9852: FAQ
  • +AD9854: FAQ
  • +AD9854ASQ: FAQ
  • +AD9856: FAQ
  • +AD9857: FAQ
  • +AD9858: FAQ
  • +AD9859: FAQ
  • +AD9910: FAQ
  • +AD9912: FAQ
  • +AD9913: FAQ
  • +AD9914: FAQ
  • +AD9915: FAQ
  • +AD9945: FAQ
  • +AD9951: FAQ
  • +AD9952: FAQ
  • +AD9953: FAQ
  • +AD9954: FAQ
  • +AD9956: FAQ
  • -AD9957: FAQ
    • 64 bit Windows compatibility
    • AD9957: maximum signal bandwidth
    • AD9957AD9910_Matched Latency Enable Bit
    • AD9957_CCI overflow
    • Can the AD9957 Evalboard and software generate CDMA modulation of the AD99957?
  • +AD9958: FAQ
  • +AD9959: FAQ
  • +DDS: FAQ
  • +Digital Ground (DGND): FAQ
  • +Evaluation Software: FAQ
  • +Frequency Ramp: FAQ
  • +I/O_UPDATE: FAQ
  • +Maximum Clock Rate: FAQ
  • +PLL: FAQ
  • +Programmable Modulus: FAQ
  • +SFDR: FAQ
  • +Thermally Enhanced Packages: FAQ

AD9957AD9910_Matched Latency Enable Bit

Q 

I am using AD9957, the reference clock is 48MHz, the system clock is 960MHz,
output 60MHz signal(Single Tone  Mode), and met a problem.
1. When he configured "Matched Latency Enable " Bit as 1, after power on, the
9957's output isn't stable. Sometimes there is only 60MHz signal(0dBm),
sometimes there are 60MHz,120MHz and 240MHz harmonic frequency, sometimes the
output is 240MHz(forth of 960MHz);
2. When he configured "Matched Latency Enable " Bit as 0, the output is always
correct.
Whether the "Matched Latency Enable " will influence the output? He also want
to more descriptions about "Matched Latency Enable "?

 

A 

The AD9957 and AD9910 are the same die. Bond wires separate the products
functions.
The match latency feature works on the AD9910.
A little about Match latency…...If a user wants to change two or more
parameters (frequency,phase,amplitude) at the same time and also wants that
change coincident at the DDS output, you must set the match latency bit to
logic 1. Otherwise, changes in the parameters will not be coincident.
Apparently, the AD9957 does not support the match latency feature..
The match latency bit should always be set to logic 0.

Tags: ad9957
  • Share
  • History
  • More
  • Cancel
analog-devices logo

About Analog Devices

  • Who We Are
  • Careers
  • Newsroom
  • What We Do (Signals+)
  • Investor RelationsExternalLink
  • Quality & Reliability
  • Sales and Distribution
  • What's New on Analog.com
  • Contact Us

Find Help

  • Support
  • Resources
  • WikiExternalLink
  • Analog Dialogue
  • ADI Developer PortalExternalLink

myAnalog

Interested in the latest news and articles about ADI products, design tools, training, and events?

Go to myAnalog
  • Instagram page
  • Twitter page
  • Linkedin page
  • Youtube page
  • Facebook
  • Legal and Risk
  • Accessibility
  • Privacy Policy
  • Privacy Settings
  • Cookie Settings

©2026 Analog Devices, Inc. All Rights Reserved

analog-devices

About Analog Devices

Down Up
  • Who We Are
  • Careers
  • Newsroom
  • What We Do (Signals+)
  • Investor RelationsExternalLink
  • Quality & Reliability
  • Sales and Distribution
  • What's New on Analog.com
  • Contact Us

Find Help

Down Up
  • Support
  • Resources
  • WikiExternalLink
  • Analog Dialogue
  • ADI Developer PortalExternalLink

myAnalog

Interested in the latest news and articles about ADI products, design tools, training, and events?

Go to myAnalog
Instagram page Facebook Twitter page Linkedin page Youtube page
  • Legal and Risk
  • Accessibility
  • Privacy Policy
  • Privacy Settings
  • Cookie Settings

©2026 Analog Devices, Inc. All Rights Reserved