AD9102 ACE software - To use it as function generator with 500us pulse 10us rise/fall time

Hi SGR2001 ,

Thank you for using AD9102.

The 500 µs pulse cannot be generated at 156.25 MHz using the 4096-sample SRAM because the full memory only represents about 26.2 µs. To generate a 500 µs high pulse with 10 µs rise/fall time, the DAC update clock should be reduced to approximately 7.8125 MHz or lower, then the SRAM waveform should be regenerated using about 78 samples for the rise, 3906 samples for the high level, and 78 samples for the fall. In ACE, select SRAM waveform mode, set the DAC clock to the actual external clock value, configure START_ADDR/STOP_ADDR for the loaded waveform, and ensure the pattern period is longer than the full waveform length. Also verify that the external clock path is selected in hardware and that the DC-coupled output path is used, because transformer/AC-coupled outputs can show only spikes or droop for this type of slow pulse.

Thanks and kind regards,

Alex

Hi SGR2001 ,

Thank you for using AD9102.

The 500 µs pulse cannot be generated at 156.25 MHz using the 4096-sample SRAM because the full memory only represents about 26.2 µs. To generate a 500 µs high pulse with 10 µs rise/fall time, the DAC update clock should be reduced to approximately 7.8125 MHz or lower, then the SRAM waveform should be regenerated using about 78 samples for the rise, 3906 samples for the high level, and 78 samples for the fall. In ACE, select SRAM waveform mode, set the DAC clock to the actual external clock value, configure START_ADDR/STOP_ADDR for the loaded waveform, and ensure the pattern period is longer than the full waveform length. Also verify that the external clock path is selected in hardware and that the DC-coupled output path is used, because transformer/AC-coupled outputs can show only spikes or droop for this type of slow pulse.

Thanks and kind regards,

Alex