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AD9838 Production
The AD9838 is a low power DDS device capable of producing high performance sine and triangular outputs. It also has an on-board comparator that allows...
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AD9838 on Analog.com

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how to get set able frequency at IOUT

		
	
				

			

									
					    TWAIPL
					
							

            
            			
				
									
											
			
			
				
			
			
			    	
			                    
                
				                on Feb 5, 2026 
				
			
			
		

		
		                    	    

        	    
Thread Summary

                The user is troubleshooting an LVDT excitation circuit using the AD9838BCPZ DDS with a 16 MHz external MCLK. The issue was that the frequency remained fixed despite writing new values. The solution involved correctly setting the RESET bit in the control register, writing the frequency register, and then clearing the RESET bit. The desired output frequency is 7 kHz, and the correct SPI transactions are 0x2108, 0x4AC1, 0x4007, 0x0008.
                        	    

                
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Category: Software

    		        		            		    
Product Number:  AD9838BCPZ, AD9838 

    		        		        		        
Software Version: STM32CubeIDE Version: 1.19.0

    		    		    

		    		    
		    			

			    
   


I’m designing an LVDT excitation circuit using AD9838BCPZ DDS with a 16 MHz external MCLK, controlled by STM32F103C8T6.
 The board generates a clean sine wave, but the frequency remains fixed even when new frequency values are written.
 I’ve attached the schematic and would like help reviewing the design and understanding proper frequency generation and control

			

			
									
		                                 
Thread Notes  

                

        
                                        
                        

    

                                            
                 software
                
                                                    
                 ad9838
                
                                                    
                 clock and timing
                
                                                    
                 Direct Digital Synthesis (DDS)
                
                                                    
                 STM32CubeIDE Version: 1.19.0
                
                                        
                                            
                
                
                                
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    •  Analog Employees  
    
            
						
                            
            
            				
            
                on Feb 6, 2026 4:36 AM
            
            
						
			            		
    
		
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    What frequency is the desired output?
    

    Setting the frequency register involves several transactions on the SPI bus. I recommend following the flow diagram in Figure 25. First set the RESET bit in the control register, followed by two transactions to write the frequency register. Finally, clear the RESET bit to get the DDS running. Each transaction is 16 bits in length. Note that data is captured on the falling edge of SCLK, not the rising edge.
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
						
						
				
				
		
		
    
			
		
    
	
    

    

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                on Feb 6, 2026 5:37 AM
            
            
												
						in reply to Antonius
					
										
			            		
    
		
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    Thanks for the reply.
     The desired output frequency is 7 kHz. I followed the same sequence, and the data is captured on the falling edge of SCLK as well.
     However, I’m still not getting the expected output. I’ll recheck the setup once again and confirm.
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
				
						
				
				
		
		
    
			
		
    
	
    

    

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