AD9952 Phase difference between IOUT and REFCLK

Hi,

I have moved this question about AD9952 to the Direct Digital Synthesis community.  Someone here should be able to assist you.

Thanks,
Janine

Thanks. Looking forward to the answer.

Y.Kubota

Hi YKubota ,

Apologies for responding late. May I know if you're application, you're using the device as a buffer? For now, I do not have the design specific answer to your question. But I believe IOUT has been influenced by accumulators on the DDS core which makes it having a different phase to REFCLK. 

All the best,

Jules

Hi Jules.

Thank you very much for your answer.  

>May I know if you're application, you're using the device as a buffer? 

Now checking it with the customer.

>For now, I do not have the design specific answer to your question. But I believe IOUT has been influenced by accumulators on the DDS core which makes it having a different phase to REFCLK. 

I understand that it works by different phase of REFCLK, but as for influence by accumulators, can you give some more details on how it works?

Regards.

Hi YKubota ,

The accumulator adds the value of the Frequency Tuning Word (FTW) to its output on each rising edge of the system clock. Hence, the accumulator output advances (numerically) in steps – the size of the steps being the value of the FTW. Therefore, over time, the output of the accumulator is a numeric ramp with a maximum value of 2N – 1 that rolls over to (or through) 0. The input of the angle-to-amplitude block treats the range of the accumulator output, 0 to 2N, as the angular range of a complete circle, 0 to 2p radians (or 0 to 360°).

All the best,

Jules

Thank you for your reply.

I understand that the accumulator operates on the rising edge of the system clock.
Also, regarding the phase, in addition to the "PHASE ACCUMULATOR", I think that "PHASE OFFSET" and "COS(x)" are also related as shown in the block diagram. Could you please explain in more detail how they are related?