AD9959 evaluation board control

On the board should be jumper W7 which controls the output enable pins of logic buffers that are between the cypress USB microcontroller and the AD9959.  If this jumper is connected to GND, the buffer outputs should be enabled meaning these digital lines are being controlled by the cypress chip.  If this jumper connects to AVDD, the outputs should be tri-state, allowing them to be control by the IO headers.  For external control of P0 - P3 you want to use header U2 and pins 3, 5, 7 and 9.  The AD9959 evaluation board schematic will help you to understand what's going on.

If you were trying to use U13 pins 11, 13, 15, and 17, those connect to the input side of the logic buffers.  They would allow you to see what the cypress chip is sending to the AD9959, but they do not allow you to control these pins externally.

A few more things to mention, if you do set W7 for external control you will need to control the rest of the digital lines as well, otherwise they will be floating and could cause all sorts of problems.  Also, the low impedance you were seeing before was likely the cypress chip or the logic buffer pulling the profile pins low and trying to keep them low.

Thanks for the advice. I was indeed connecting to pins 3, 5, 7, and 9 on U2, but I wasn't moving jumper W7. Looking at the schematics and manual, as well as reading this discussion:

https://ez.analog.com/message/45738

revealed the solution: to short pins 11, 15, 17, and 19 on U2 to ground and moving the W7 jumper to "manual" mode (i.e. pulling up the pin to AVDD).

The input impedance for pins P0-P3 now seems limited by the 1k resistors R29, R65, R66, and R67 which connect P0-P3 to ground on the evaluation board.