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AD9910 Recommended for New Designs
The AD9910 is a direct digital synthesizer (DDS) featuring an integrated 14-bit DAC and supporting sample rates up to 1 GSPS. The AD9910 employs an advanced...
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AD9910 on Analog.com

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Is AD9910 IO_UPDATE line gated by chip select?

		
	
				

			

									
					    DavidLee
					
							

            
            			
				
									
											
			
			
				
			
			
			    	
			                    
                
				                on Sep 13, 2014 
				
			
			
		

		
		                    	    

        	    
Thread Summary

                The user asks if multiple AD9910 DDS chips can share a common IO_UPDATE line, independent of chip select. The final answer confirms that the IO_UPDATE line is not gated by chip select, so sharing it could cause old data to be transferred to active registers. The engineer recommends using separate IO_UPDATE lines for each AD9910 to avoid unintended updates, even though the chips can share the serial data clock and data lines.
                        	    

                
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Hi,

 
I have a few AD9910s that need to share a common serial port from my MCU. I use chip select to enable serial IO to one device at a time.

 
My question is: Can several AD9910s share a common IO UPDATE line? Is the IO UPDATE line enabled by chip select? It's not clear in the data sheet.

 
Cheers,

 
David

			

			
									
		                             
                        

    

                                            
                 clock and timing
                
                                                    
                 Clocks & Timers
                
                                                    
                 Direct Digital Synthesis (DDS)
                
                                                    
                 ad9910
                
                                
            

    
    
		


				
				        
        		

			
						
									
												
			
			
                        
                                    
                        
                        
                        
            
			            
						
						
			
			
			
			
		


        
        
        
    
					

			





















	

	

					



			








	
	
	
	



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    •  Analog Employees  
    
            
						
                            
            
            				
            
                on Sep 14, 2014 2:46 PM
            
            
						
			            		
    
		
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    Hi David,
    
 
    You can refer to this circuit note for reference on multiple chip sync on AD9910s: Circuit Note | CN0121 | Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers | Analog Devices
    
 
    DDS cores has I/O buffered register and active registers.
    
 
    The serial write (SDIO, SCLK, -CS) only writes to the inactive register  (I/O buffer) of the DDS.
    
 
    The I/O_UPDATE is a different input. A rising edge on I/O_UPDATE initiates a transfer from inactive register to active register. You can refer to page 42 of AD9910 datasheet.
    
 
    What we recommend, is write first on the I/O buffer, before sending all the register values to the active registers.
    
 

    
 
    Is the IO UPDATE line enabled by chip select?
    
 
    So, it is better not to enable I/O_UPDATE thru chip select because you need to consider the hold-time and set-up time of I/O_UPDATE with respect to SYNC_CLK. 
    
 
    The recommended setting would be, to have a different control for I/O_UPDATE. You can serially write to all DDSs and then, issue I/O_UPDATE to all DDSs.
    
 

    
 
    Can several AD9910s share a common IO UPDATE line?
    
 
    Yes you can, as long as your microcontroller GPIO current limit is set to drive all the AD9910 I/O_UPDATE input. The logic 1 current for each AD9910 has max value of 150uA. 
    
 
    IF not, I suggest you use a buffer or CMOS driver before sending the I/O_UPDATE signal to make sure you have enough drive capability. This will also serve as protection, allowing isolation of output/input of the system.
    
 

    
 
    Hope this helps.
    
 

    
 
    -Sittie
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
				
						
				
				
		
		
    
			
		
    
	
    

    

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    •  Analog Employees  
    
            
						
                            
            
            				
            
                on Sep 14, 2014 2:46 PM
            
            
						
			            		
    
		
										0
					
	
    

		
		
    
		
    
                                
                                                            
    
					
    Hi David,
    
 
    You can refer to this circuit note for reference on multiple chip sync on AD9910s: Circuit Note | CN0121 | Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers | Analog Devices
    
 
    DDS cores has I/O buffered register and active registers.
    
 
    The serial write (SDIO, SCLK, -CS) only writes to the inactive register  (I/O buffer) of the DDS.
    
 
    The I/O_UPDATE is a different input. A rising edge on I/O_UPDATE initiates a transfer from inactive register to active register. You can refer to page 42 of AD9910 datasheet.
    
 
    What we recommend, is write first on the I/O buffer, before sending all the register values to the active registers.
    
 

    
 
    Is the IO UPDATE line enabled by chip select?
    
 
    So, it is better not to enable I/O_UPDATE thru chip select because you need to consider the hold-time and set-up time of I/O_UPDATE with respect to SYNC_CLK. 
    
 
    The recommended setting would be, to have a different control for I/O_UPDATE. You can serially write to all DDSs and then, issue I/O_UPDATE to all DDSs.
    
 

    
 
    Can several AD9910s share a common IO UPDATE line?
    
 
    Yes you can, as long as your microcontroller GPIO current limit is set to drive all the AD9910 I/O_UPDATE input. The logic 1 current for each AD9910 has max value of 150uA. 
    
 
    IF not, I suggest you use a buffer or CMOS driver before sending the I/O_UPDATE signal to make sure you have enough drive capability. This will also serve as protection, allowing isolation of output/input of the system.
    
 

    
 
    Hope this helps.
    
 

    
 
    -Sittie
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
				
						
				
				
		
		
    
			
		
    
	
    

    

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