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AD9914 Recommended for New Designs
The AD9914 is a direct digital synthesizer (DDS) featuring a 12-bit DAC. The AD9914 uses advanced DDS technology, coupled with an internal high speed,...
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AD9914 on Analog.com

AD9959 Recommended for New Designs
The AD9959 consists of four direct digital synthesizer (DDS) cores that provide independent frequency, phase, and amplitude control on each channel. This...
Datasheet
AD9959 on Analog.com

AD9914S Recommended for New Designs
The AD9914S-CSL is a direct digital synthesizer (DDS) featuring a 12-bit digital-to-analog converter (DAC). The AD9914S-CSL uses advanced DDS technology...
Datasheet
AD9914S on Analog.com

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AD9914 Synchronization at 2.5 GHz reference frequency

		
	
				

			

									
					    jpotter0
					
							

            
            			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Aug 22, 2017 
				
			
			
		
    
		
		                    	    
    
        	    
    Thread Summary
    
                The user seeks to align a 3.3 V I/O_UPDATE signal with a 1.8 V SYNC_CLK for the AD9914 and synchronize two AD9914s. The final answer suggests using a thread and an application note for guidance on synchronization. The user is also advised to consider lowering the clock frequency to 2.5 GHz to achieve the required synchronization, allowing the 2856 MHz signal to be generated from the alias fo+fref by setting fo to 356 MHz.
                        	    
    
                
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    I have two questions.
    
 
    I want to align the I/O_UPDATE signal with SYNC_CLK on an AD9914. I know how to do this and have done it successfully with AD9959 chips. In that case I used two sections of a 74LVC74 D Flip-Flop with 3.3 Vdc power, with the I/O_UPDATE pulse on the D input of the first flip flop and the SYNC_CLK on both clock inputs. I tried doing the same with the AD9914, but the amplitude of the SYNC_CLK signal is too low, about 1.8 V maximum. I think I can make the circuit work if I reduce the Vcc to 1.8 V, but then I will have an output signal that is too low for the 3.3 V logic input of the AD9914.
    
 
    So the first question is: How do I align a 3.3 V I/O_UPDATE signal with the 1.8 V SYNC_CLK signal and get a 3.3 V logic signal out.
    
 
    Second question.
    
 
    I was planning on using an AD9914 to generate a signal at 2856 MHz using a reference clock frequency of 3.5 GHz. This actually works fine, except that I need two signals that are synchronized. I don't care about the absolute timing, but I need the two outputs to have the same phase difference every time I turn the system on. I am now reading that it is not possible to synchronize two AD9914s with a 3.5 GHz clock.
    
 
    So the second question is: Will I be able to synchronize the AD9914s if I lower the clock frequency to 2.5 GHz? I will be able to get my 2856 MHz signal from the alias fo+fref, by setting fo to 356 MHz.
    
 
    Thanks,
    
 
    Jim
    
			
    
			
									
		                             
                        

    
    
                                            
                 AD9914s
                
                                                    
                 clock and timing
                
                                                    
                 Clocks & Timers
                
                                                    
                 ad9959
                
                                                    
                 Direct Digital Synthesis (DDS)
                
                                        
                                            
                
                
                                
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