AD9850Production
The AD9850 is a highly integrated device that uses advanced DDS technology coupled with an internal high speed, high performance, D/A converter and comparator...
Datasheet AD9850 on Analog.com
The user inquired about the AD9850's frequency update latency on a 125MHz source. The engineer confirmed a minimum latency of 18 clock cycles in parallel mode, with a total of 24 clock cycles for writing and updating the frequency. Serial mode has no specified latency, and changing both frequency and phase has a minimum latency of 18 clock cycles and a maximum of 31 clock cycles.
AI Generated Content
how much time/clock cycles will AD9850 take to update frequency on a 125MHz source?
1. Is this 18 clock latency is present in serial mode also? In data sheet output latency is written in parallel mode's table.
2. I have calculated total time taken for writing and updating the frequency in parallel mode as 5clks(40 bit) + 1clock(FQ-UD) + 18clks latency = 24clocks. Is this correct?
3. In serial mode 40 clks(40 bits) + 1clk(FQ_ud) = 41clks. Is serial mode has latency?
4. if i change the frequency and phase will it take 18clks + 13 clks ?
