AD9959: FAQ

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  • AD9959 evaluation board clock

    Q We are currently using an AD9959 DDS evaluation board. I am interested in clocking the system using the external quartz option. Could you please suggest an option for the quartz crystal? A We…
  • AD9959: ADIsimDDS_spectrum

    Q Currently, we found the bandwidth of single tone output from frequency response in the ADIsimDDS tool is 800KHz. Pls see the attached. Is it all right for such wide bandwidth? Or is there something…
  • AD9959: FSK modulation performance

    Q I did an experiment of AD9959EVB. System Clock is 500MHz, FTW0 = 10MHz, FTW1 = 10.1MHz, use P0 Pin to switch the DAC's output frequency.When the switching time is 20us, then the DDS's output is like…
  • Ad9959: Oscillator

    Q Is the ballon a t Pin 8 & 9 required when using an oscillator to drive the inputs or is the ballon just used to accommodate the mismatch of the external clock input impedance on the Eval-board? …
  • Is Data Valid Time (tDV) of 12nS for AD9959 correct? Or should it be 1.2nS instead?

    Q Data Valid Time (tDV) is indicated as 12ns minimum (refer to Table 25 On page 31 of the AD9959 RevB data-sheet. This can't be true with respect to the fast 5ns serial-data clock? Should it be 1.2ns…
  • The AD9959's SYNC_CLK has no signal. What should I check to fix this?

    Q The AD9959's SYNC_CLK has no signal. What should I check to fix this? A The SYNC_CLK should be running by default in crystal REF CLK mode or in any other REF CLK mode. However, the following…

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