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RAJJAR
Hi All,   We have setup like input source --> ADV7511 --> output source with different timings.   Input source always 1080P60.   I can able to read the EDID info (verify by 0x7E register block).   I want to send ADV7511 output resoltion with respect to EDID support timing.   How to parse and setup Video ?   Regards, RAJ M
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vishwajit.vk
I want to feed 12 channels of RGB signals, 1 Y/C signal (i.e.) 38 signals as input to crosspoint switch. The available crosspoint switch (ADV3201) supports only 32 inputs : 32 outputs. I want to derive 2 outputs from any input channels that I want without any limitation. So kindly suggest me Analog devices parts to implement my logic.
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tjohn28
I connected the HDMI-1 and HDMI-2 from the PCP (is the display port / HDMI port from Nvidia) and it works with the PTN3360 with AC coupling caps and pull down.  However when I connect to the ADV7513 then it does not work with PTN3360.  Why the ADV7513 does not work with the NXP PTN3360?  See below block diagram.  Can you also ask Analog devices… (Show more)
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shawnx
As title, which OP_FORMAT_SEL should i use to generate BT656 8-bit(YUV 4:2:2 with UYVY) free run signal? ex. default value(0x00, 8 bit SDR ITU-656)? If i try to output BT656 8-bit(YUV 4:2:2 with UYVY) with 720 X 480 resolution, may i use below register setting? 0x98 0xFD 0x44 0x98 0x00 0x1E 0x98 0x01 0x05 0x98 0x03 0x20 0x98 0x05 0x28 0x98 0x0B… (Show more)
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vishwajit.vk
How to implement 48 inputs and 5 outputs i.e. 42 x 5 using three AD8106/8107 crosspoint switch?
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saikiran
Hi,   I have a STANAG 3350B input for my processor and I am processing it after passing it through ADC. I need to compensate the processing delay at the cost of some video data. so, the Csync extracted from the input STANAG needs to be directly passed to the output. at the output I need to convert digital output of my processor to STANAG 3350B… (Show more)
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Fermat
Dears   I have a question about ADV8005 TX, I set TX mode with DVI mode. ADV8005 TX --> Sink(Monitor)   If sink already power on and ADV8005 Tx output signal, then sink can display correct DVI signal from ADV8005. If sink is power off, and ADV8005 Tx output signal, the power on sink, sink will be no sync from ADV8005.   I didn't detect HPD… (Show more)
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cdsteinkuehler
Are there a recommended settings for the ADV7619 for RGB 444 In - 2x24-bit YCbCr Out?  I have reviewed the scripts available in ADV7619-VER.1.9c.txt, which contains the following:   :03-01 RGB 444 In - 2x24-bit RGB 444 Out - For use up to 4k2k: :03-02 YCbCr 422 In - 2x24-bit YCbCr 422 Out - For use up to 4k2k: :03-03 YCbCr 444 In - 2x24-bit… (Show more)
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dh29
I am using an iMX7D NXP processor (Linux Freescale BSP v4.9.11) with an ADV7280M connected via its MIPI CSI interface. I have this arrangement successfully working for PAL in both PROGRESSIVE and INTERLACED operating modes of the ADV7280M. This works with both a PAL camera feed and when the ADV7280M generates its own PAL test signal (color-bars).… (Show more)
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lulei1
Hi All.   We use adv7480  chip for our custom board。 I tried intialization script, “08-14 Free-run MIPI TxA CSI 4-Lane - RGB888, 1920x1080p 60Hz“ example of  ADV7481ES3C-VER.3.6c。 I can see digital signal on D0P and D0N to D3Pand D3N pins, but can`t see MIPI CLK signal on CLK P and CLK N pins。 I checked signal on XTAL. It is 28.6 MHz. CLK… (Show more)
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