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ddk
Regarding the Matlab reference design ( GitHub - analogdevicesinc/MathWorks_tools: Scripts and tools created by ADI to be used with MATLAB and Simulink with ADI…  )   has the AXI bus version in the the reference design ( used by axi_ad9361_adc_dma ) changed from AXI4 to AXI3 ?   I can no longer set the DMA to transfer 8192 bytes per transfer… (Show more)
in FPGA Reference Designs
tancarrerece
Hello, greetings of the day, I'm trying to build one reference fmcomms5 design (found on the github repo) according to the Building HDL [Analog Devices Wiki]  procedure. I have used both 'make -c fmcomms5  all' using cygwin and 'source' TCL commands using vivado 2018.1 in the respective directories and  the building process starts according to… (Show more)
in FPGA Reference Designs
rlaghlfh
Hi, I'm using an FMCADC2-EBZ (AD9625) board with VC707. (Vivado 2017.4) I followed 'Microblaze quick start guide' and succeeded in connecting the linux and IIO Oscilloscope through Ethernet. Now I have a few questions.   1. when I type 'connect mb mdm', there's a warning (q1.jpg). It says that the version of  MicroBlaze is unsupported. Is it… (Show more)
in FPGA Reference Designs
rwe
Is there one or multiple excel sheets that contain the pin assignments of all ADI FMC boards?   I'm designing an FPGA base board with 2 FMC connectors, and I want to distribute my free FPGA pins as 'good as possible' to these FMC connectors, so I can make maximal use of commercial FMC boards.   Ideally I would be able to populate 2 HPC… (Show more)
in FPGA Reference Designs
mertk
Hello,   I'm currently trying to understand how axi_ad9361 works. In my testbench, when I drive inputs according to waveforms given in AD9361 reference manual UG570, I see my data adc_data_x output port. But adc_enable_x port never asserts to 1. Is there a in-depth documentation of this IP where I can see how all input and output waveforms should… (Show more)
in FPGA Reference Designs
ben1681
I have encountered some prolem these days. In our project,we have got a ZC706 board, a fmcomms3-ebz board and a fmcomms4-ebz board. However, we haven't got a fmcomms5-ebz board. These boards are used for experiments and simulation, and we have developed a small- sized system without some functions we don't need based on the referrence designs of… (Show more)
in FPGA Reference Designs
luckfyzhang
Hello, I want to implement MATLAB QPSK Receiver Model demo on my ZC702 board. Initially, Mathworks does not offer official support to ZC702, but ADI do provide extended BSP package for it. So combining all these instructions and toolsets, I think I may be able to implement this design. Hence, I directly followed ADI workflow advisor and… (Show more)
in FPGA Reference Designs
jsamson
I downloaded the ADI7511 API from github, and I'm trying to build the demo software but I get lots of undefined references:   undefined reference to `HAL_GetMBSwitchState' undefined reference to `ADIAPI_TxGetChipRevision' undefined reference to `HAL_PlatformInit' undefined reference to `HAL_GetCurrentMsCount' undefined reference to… (Show more)
in FPGA Reference Designs
swaxman
Hi, The TX sample rate of the FPGA logic is 1/2 of what is specified in the profile. For example when TX input rate in profile  is 200MHz the FPGA TX clock generator and datapath logic is 100MHz. Where are the TX samples interpolated to 200MHz before entering the AD9371 signal chain ? thanks.
in FPGA Reference Designs
diverger
I'm designing a DAQ system like below, and the candidate ADC is AD9226, with Xilinx Zynq-7 series :     And I wonder if there are some reference designs or IPs can help?   Thanks.
in FPGA Reference Designs
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