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Narendra_patel
Hello Engineers       How to get value of AD9361 registers value? from Terminal Commands. in help register? is given but its not working. also how to set the value of AD9361 Registers in no-os flow.   Regards Narendra
in FPGA Reference Designs
Narendra_patel
Hello Engineers,         can i simulate ad9361 fmcomm2 hdl in vivado. ?    Regards Narendra Patel
in FPGA Reference Designs
rosy2cloud
Hi~    I am using  adrv9371 hdl reference design on zc706, I want to add a ram and  own module before ipcore "axi_ad9371_dacfifo" to verify algorithm, and the ram can circulately send signal through own module to "axi_ad9371_dacfifo".but I get confused with ipcore "axi_ad9371_tx_dma",the output "m_axis_data" is 128 bit,and It looks like consist… (Show more)
in FPGA Reference Designs
twarner
Can you please point me to the reference design for the ADRV9361-Z7035? I don't see anything in the github repository. I am planning to use the breakout board with no OS.  I previously ported FMCOMMS2 from zed to microzed.  It took several days of schematic tracing to get .xdc correct.
in FPGA Reference Designs
cswanson
Support, I am excited that I potentially solved my struggles with getting ES2 silicon on the zcu102 development board to compile correctly in Vivado for the DAQ2/ZCU102 HDL and No-OS git repositories branch hdl_2017_r1 using Vivado 2017.2.1.   I modified the hdl/projects/scripts/adi_project.tcl file.  Specifically, I changed the device to es2… (Show more)
in FPGA Reference Designs
AlexCPM
Dear Analog Support, I have to use a custom board with one XC7K160T-2FBG676C to interface and use two AD9364 (both of chains tx and rx); I tried to write my own interface (in HDL), but I didn't find so much information on standard documentation, so I have some questions: a) Is there some design guidelines to write a custom interface (mostly on… (Show more)
in FPGA Reference Designs
niba
I read some threads and I saw that I should comment out define CONSOLE_COMMANDS line in the config file but when I do that I get error in main.c file which says there is no command.h file and thats true I copied the files from the github  and even in the github  there is no command.h file where can I find that file 
in FPGA Reference Designs
zsami
Hi,  I'm using the ad9371 evaluation board with a zinq zc706, I'm building an application (no-OS) using the hdl and sw from github 2017_r1 branch. I know this branch is still under development, still I tried to make it work. I guess there is a problem with JESD cores getting properly reset. Besides, rx_phy0, rx_phy1  inputs to rx_jesd core is 64… (Show more)
in FPGA Reference Designs
waveform10
Hello.   Now, I go thru building and checking AD FPGA AD9371 project on my development kits Arria 10 GX and ADRV9371-W / PCBZ.   My current configuration is:   Project: hdl \ projects \ adrv9371x \ a10gx Project brunch: Master Nios project: no-OS \ ad9371 \ sw \ NIOS branch: 2016_R2 Quartus Prime: 16.0.2.222 standard edition Eclipse… (Show more)
in FPGA Reference Designs
jsusong
How does ADI generate Vivado Project and Library files for the GIT repository?  Are there scripts available to generate these files?  I would like to follow ADI's process when committing my design to a HDL GIT repository.
in FPGA Reference Designs
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