• aducm330 slave mode communication

    Hi all   One of my customers uses the ADuCM330 in slave mode, she wants to communicate under certain circumstances without any request from master.   Initial state : Master sleep / Slave(ADuCM330) sleep T...
    Andrew.Choi
    last modified by Andrew.Choi
  • ADSP-2187 CLKIN and ASTAT issues

    I have been working for a long time with ADSP-2187N in 144-BGA package (ADSP-2187NBCA-320) giving it as input clock a 40MHz sine wave (3Vpp) without any problem. Datasheet doesn't specify other characteristics. For o...
    RadioFrank
    created by RadioFrank
  • Is ADSP-218xN family code compatible with ADSP-2115 obsoltete part?

    I need to replace obsolete ADSP-2115 family with a new one hopefully code compatible. Is the ADSP-218xN family a good choice?
    ferario
    last modified by ferario
  • Link port Communication in 4 bit mode is not happening!!!..

    .   I am using 2 ADSP TS201S Processors in my board. I am facing one issue with the link port communication. The link port communication (Only L2) is not happening in ambient temperature. Above 40 to 45°C t...
    santhanakrishnan
    last modified by santhanakrishnan
  • hi, i have a question about cclk monitor: How to monitor cclk directly from certain pin by use of oscilloscope?

    For ADSP-TS101S, it seems cclk is not stable and sometimes the chip fail to start. I doubt about the poor power design leading to unstable internal clock. I want to have a way to monitor internal clock directly.
    digitalhcj
    last modified by digitalhcj
  • Pricing for ADSP-TS201SABPZ060

    Hello,   Since this part ADSP-TS201SABPZ060 is obsolete I couldn't find a pricing for the Chip.   Can you please help me by sending me an Quotation.   Qty - 1 No. 
    g.amarnath17@gmail.com
    last modified by g.amarnath17@gmail.com
  • Where can I find the EABI document for the TigerSHARC architecture?

    Hello, I am currently studying a bit of the TS-201S processor and I need to understand some of its conventions, such as parameter passing and stack frame construction. When doing the same for other processor brands, ...
    rbedinfr
    last modified by rbedinfr
  • Migrating from ADSP-2191M

    Hello,   After using the ADSP-2191M for 15+ years we're looking for a new processor, mostly because VisualDSP++ 3.5 is not supported on current operating systems.   We're interested in a more recent proces...
    lmirkin
    last modified by lmirkin
  • Unable to set SYSCON register in TS101S through USB-ICE emulator

    We designed a board using TS101S processor at 300MHz. Schematics taken from EZ-KitLite. The card is up and fine. JTAG scan passes and enters the Emulator Session via USB-ICE without any issue. We have not yet written ...
    kgk123
    created by kgk123
  • Can use LIN D/L when UARTMODE of ACuCM330 is enabled?

    Hi all   When the 11th bit (UARTMODE) of the LIN Interrupt Mask Register is enabled, is LIN communication (D / L) normally enabled by the 28th LIN I / O pin?   Thank you
    Andrew.Choi
    created by Andrew.Choi
  • ADuCM330 AUX sensing related inquiries

    Hi all One of the customers inquired about using the ADuCM330 AUX channel.     Previously, used ADuCM330 as Pic 1 connection. This worked fine.               ...
    Andrew.Choi
    last modified by Andrew.Choi
  • ADuCM360 wrong timer period.

    ADuCM360 wrong timer period.   I am trying to implement signal generator on ADuCM360 using DAC+DMA with TIMER1 as DMA activation source. The microcontroller is running on 16 MHz, timer is configured for PCLK as ...
    rvictor
    last modified by rvictor
  • About the Timer2 Clear Register of ADuC7061

    Hi,   In the ADuC7023 data sheet (Rev. F), p. 87, T2CLRI Register "The user must perform successive writes to this register to ensureresetting the timeout period."  is written. On the other hand, it is not...
    wbp501
    last modified by wbp501
  • About the external interrupt of ADuC7023

    Hi,   Interrupt of External IRQ 1 is not cleared. Please advise if there are problems with the settings below.   <Configuration> - The interrupt on the rising edge of External IRQ 1 is enabled  ...
    wbp501
    created by wbp501
  • ADSP-218x using variable between functions

    Hi all   I am using an ADSP-218x as a sequencer for a CCD. Normal readout works perfectly well, and I can also perform a process called 'pocket pumping' (where charge is moved back and fourth between the pixels)...
    skottfelt
    last modified by skottfelt
  • Where I can find the documentation about obsolescence ADSP-2185BSTZ-115?

    #ADSP-2185 #obsolescence
    semiletova
    last modified by semiletova
  • What is the correct power-up sequence for ADSP-2191?

    The ADSP-2191 datasheet has the following statement on page 11 concerning the power-up sequence:   "Power up together the two supplies VDDEXT and VDDINT. If they cannot be powered up together, power up the inter...
    lmirkin
    last modified by lmirkin
  • I wanted to know if the DSP : ADSP-2191MBSTZ-140 can be put into TRISTATE mode or not. Can anyone please help me on this?

    This is with respect to JTAG boundary scan chain and I wanted to know if the instruction registers support the DSP to be put in HIGHZ(tristate) mode. Kindly, help me in answering this query.
    AkshayK
    last modified by AkshayK
  • [Error li1021]

    Hi I am using the Sharc ADSP21364 with the latest development tool release. I have created a small simple library function called rocket() and have compiled/mapped it into the ldf file. In addition, I have added a pr...
    topcatnew
    last modified by topcatnew
  • Can I access TigerSharc DSP processor directly with PC without glueless interfacing to FPGA?

    Guys, I am working on designing of a test board which involves both FPGA(Xilinx- Kintex 7) and DSP(Tiger Sharc) based signal processing. Now the end user wants to access the DSP processor programming options/ boot co...
    mandan
    last modified by mandan