Category: Datasheet/Specs
Product Number: ad9695
I want to use the NCO channel FAST switch,but only channel 0 FTW config success,the channel 1 always config failed. what is wrong with my code?
//-----------------nco fast config-----------//
//----------ddc0 ch0--------------------//
20'h0_6a00: DataReg <= {16'h0314, 8'H00};
20'h0_6c00: DataReg <= {16'h0316, AD_FREQ_156_25M[7:0]}; //coarse_dac config 3
20'h0_6d00: DataReg <= {16'h0317, AD_FREQ_156_25M[15:8]}; //offseta
20'h0_6e00: DataReg <= {16'h0318, AD_FREQ_156_25M[23:16]}; //offsetb
20'h0_6f00: DataReg <= {16'h0319, AD_FREQ_156_25M[31:24]}; //gaina
20'h0_7000: DataReg <= {16'h031a, AD_FREQ_156_25M[39:32]}; //gainb
20'h0_7100: DataReg <= {16'h031b, AD_FREQ_156_25M[47:40]}; //qmc_phaseab
//----------ddc1 ch0--------------------//
20'h0_7200: DataReg <= {16'h0334, 8'H00};
20'h0_7300: DataReg <= {16'h0336, AD_FREQ_156_25M[7:0]}; //NCO phaseoffsetab
20'h0_7400: DataReg <= {16'h0337, AD_FREQ_156_25M[15:8]}; //phaseadd lower l6bit
20'h0_7500: DataReg <= {16'h0338, AD_FREQ_156_25M[23:16]}; //phaseadd mid l6bit
20'h0_7600: DataReg <= {16'h0339, AD_FREQ_156_25M[31:24]}; //phaseadd upper l6bit
20'h0_7700: DataReg <= {16'h033a, AD_FREQ_156_25M[39:32]}; //sleep setting
20'h0_7800: DataReg <= {16'h033b, AD_FREQ_156_25M[47:40]}; //dither_sif config 38
// 20'h0_7900: DataReg <= {16'h000f, 8'h01}; //sifdc_en config 47
//----------ddc0 ch1--------------------//
20'h0_7a00: DataReg <= {16'h0314, 8'H01};
20'h0_7b00: DataReg <= {16'h0316, AD_FREQ_257_50M[7:0]}; //coarse_dac config 3
20'h0_7c00: DataReg <= {16'h0317, AD_FREQ_257_50M[15:8]}; //offseta
20'h0_7d00: DataReg <= {16'h0318, AD_FREQ_257_50M[23:16]}; //offsetb
20'h0_7e00: DataReg <= {16'h0319, AD_FREQ_257_50M[31:24]}; //gaina
20'h0_7f00: DataReg <= {16'h031a, AD_FREQ_257_50M[39:32]}; //gainb
20'h0_8000: DataReg <= {16'h031b, AD_FREQ_257_50M[47:40]}; //qmc_phaseab
//----------ddc1 ch1--------------------//
20'h0_8100: DataReg <= {16'h0334, 8'H01};
20'h0_8200: DataReg <= {16'h0336, AD_FREQ_257_50M[7:0]}; //NCO phaseoffsetab
20'h0_8300: DataReg <= {16'h0337, AD_FREQ_257_50M[15:8]}; //phaseadd lower l6bit
20'h0_8400: DataReg <= {16'h0338, AD_FREQ_257_50M[23:16]}; //phaseadd mid l6bit
20'h0_8500: DataReg <= {16'h0339, AD_FREQ_257_50M[31:24]}; //phaseadd upper l6bit
20'h0_8600: DataReg <= {16'h033a, AD_FREQ_257_50M[39:32]}; //sleep setting
20'h0_8700: DataReg <= {16'h033b, AD_FREQ_257_50M[47:40]}; //dither_sif config 38
//------------------config nco channel ----------------//
20'h0_9100: DataReg <= {16'h0314, 4'b0000, 3'b000, ch_slect};
20'h0_9200: DataReg <= {16'h0334, 4'b0000, 3'b000, ch_slect};
20'h0_9300: DataReg <= 24'h030013;
20'h0_9400: DataReg <= 24'h030003;
