(Help needed regarding the fault of AD9910 at power-on in low temperature condition)
(Fault description: AD9910 is used for frequency-dividing, with reference input of 480MHz, and output of 26~30MHz single tone signal. There is one fault ( with no output signal) out of 30 times at time of power-on in low temperature（-40℃~0℃） )
Data was sent by general SPI interface, and the timing sequence of SCLK,SDIO Vs. I/O_UPDAT is as follows:
red-SCLK, yellow-SDIO, green- I/O_UPDAT
watching the intersection of SCLK and I/O_UPDAT
question 1: Is the parameter setting-up of SCLK，SDIO Vs. I/O_UPDAT is correct as being shown above
when the timing sequence was changed as being shown followed, there was no fault at time of power-on in low temperature.
Once the I/O_UPDAT was set to high after 2 periods of SCLK, there was no fault at time of power-on in low temperature. our second question was: is there a delay required for I/O_UPDAT regarding SCLK signal? if yes, how to set up the time delay?
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