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关于ADF4360-8输出电平的问题



		

			

									
					    Eddie
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Mar 25, 2013 
				
			
			
		
    

				
		
    
		    		    
		    
		    	
			
    ADF4360-8的手册中给出输出时钟信号的最大功率为0dBm，对应1mW，如果按照负载50ohm计算，得到均方根电压值为0.22V，对应峰峰值Vpp为0.316V。
    
 
    但是我需要一个单端的lvcmos时钟，至少要达到2V才认为是高电平，最高不能超过0.8V被认为是低电平。
    
 
    请问我的计算有没有问题，应该用什么转换电路？谢谢
    
									
			        
		
    

				
						
        

    
    Tags: 
                                            
                 Integer-N PLL
                
                                                    
                 adf4360-8
                
                                                    
                 Phase Locked Loop (PLL) Synthesizer & Translation Loop
                
                                                    
                 rf and microwave