The user encountered no output from PLL1_OUT on the AD9524 when using a 25 MHz VCXO, despite observing a 25 MHz clock at OSC_IN. The final answer suggests checking the PLL1 loop parameters and ensuring REG0x1BA and REG0x1BB are not powered down. The accompanying answer recommends verifying the PLL1 lock status and providing the .stp configuration file and VCXO data sheet for further assistance.
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